Semiconductor device

Abstract

The present invention provides a semiconductor device capable of preventing an electrostatic surge without increasing a leak current. In the semiconductor device, a protection circuit for protecting an internal circuit is provided between a source line and a ground line. The protection circuit has a protection transistor of which the drain is connected to the source line and the source and gate are connected to the ground line. The protection transistor is configured by integrally forming two types of transistor structural portions. The latter of the transistor structural portions is longer than the former thereof in gate length. In addition, the sum of gate widths of the latter transistor structural portions is larger than the sum of gate widths of the former transistor structural portions.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

While the specification concludes with claims particularly pointing out and distinctly claiming the subject matter which is regarded as the invention, it is believed that the invention, the objects and features of the invention and further objects, features and advantages thereof will be better understood from the following description taken in connection with the accompanying drawings in which:

FIG. 1 is a circuit block diagram showing an essential configuration of a semiconductor device according to a first embodiment;

FIG. 2 is a plan view conceptually showing a layout structure of the semiconductor device according to the first embodiment;

FIG. 3 is a plan view showing, in enlarged form, the layout structure of the semiconductor device according to the first embodiment;

FIG. 4 is a imaginable graph illustrating a current-voltage characteristic of the semiconductor device according to the first embodiment;

FIG. 5 is a plan view conceptually showing a layout structure of a semiconductor device according to a second embodiment;

FIG. 6 is a plan view showing, in enlarged form, the layout structure of the semiconductor device according to the second embodiment;

FIG. 7 is a plan view conceptually showing a layout structure of a semiconductor device according to a third embodiment;

FIG. 8 is a plan view showing, in enlarged form, the layout structure of the semiconductor device according to the third embodiment;

FIG. 9(A) is a plan view showing, in enlarged form, a layout structure of a semiconductor device according to a fourth embodiment;

FIG. 9(B) is a conceptual diagram illustrating the principle of the semiconductor device;

FIG. 10(A) is a plan view depicting, in enlarged form, a layout structure of a semiconductor device according to a comparative example of the fourth embodiment;

FIG. 10(B) is a conceptual diagram showing the principle of the semiconductor device;

FIG. 11(A) is a plan view showing, in enlarged form, a layout structure of a semiconductor device according to a fifth embodiment;

FIG. 11(B) is a conceptual diagram showing the principle of the semiconductor device; and

FIG. 12 is a block diagram illustrating an example of an essential configuration of a prior art semiconductor device.

Claims

1. A semiconductor device comprising: an internal circuit connected to first and second source lines; anda protection circuit connected to the first and second source lines to protect the internal circuit,wherein the protection circuit has a protection transistor which includes first high-concentration impurity regions each connected to the first source line, second high-concentration impurity regions each connected to the second source line, and control electrodes which have first control electrodes each having a first gate length and second control electrodes each having a second gate length longer than the first gate length, both of the first and second control electrodes being formed integrally, and which are connected to the second source line, andwherein the protection transistor includes first transistor structural portions each having the first high-concentration impurity region, the second high-concentration impurity region and the first control electrode, and second transistor structural portions each having the first high-concentration impurity region, the second high-concentration impurity region and the second control electrode.

2. The semiconductor device according to claim 1, wherein the gate length of the first control electrode is identical to a gate length of each of transistors that constitute the internal circuit.

3. The semiconductor device according to claim 1, wherein the sum of gate widths of the first control electrodes is smaller than the sum of gate widths of the second control electrodes.

4. The semiconductor device according to claim 1, wherein contacts for connecting the first high-concentration impurity regions to the first source line are provided in the second transistor structural portions respectively.

5. The semiconductor device according to claim 1, wherein silicide electrodes and contacts for connecting the first high-concentration impurity regions to the first source line are provided in the second transistor structural portions respectively, and wherein silicide electrodes and contacts for connecting the second high-concentration impurity regions to the second source line are provided in both the first and second transistor structural portions.

6. The semiconductor device according to claim 1, wherein the first and second control electrodes are formed in such a manner that the gate lengths thereof change continuously in a boundary region between the first and second transistor structural portions to thereby make the gate lengths of the second control electrodes longer than those of the first control electrodes.

7. The semiconductor device according to claim 1, wherein convex portions are provided only on the second high-concentration impurity region side with respect to the control electrodes of the protection transistor to thereby make the gate lengths of the second control electrodes longer than those of the first control electrodes.