SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME

Abstract

A semiconductor structure includes a substrate, a capacitor disposed in the substrate, an interconnect structure disposed over the substrate, and a first doped region disposed in the substrate. The interconnect structure includes a first via structure coupled to the substrate, and a second via structure coupled to the capacitor. The first doped region is disposed under the first via structure. The first doped region includes p-type or n-type dopants.

Description

Claims

1. A semiconductor structure including a capacitor, comprising: a substrate;a capacitor disposed in the substrate;an interconnect structure disposed over the substrate, wherein the interconnect structure comprises: a first via structure coupled to the substrate; anda second via structure coupled to the capacitor; anda first doped region in the substrate and under the first via structure, wherein the first doped region comprises p-type dopants or n-type dopants.

2. The semiconductor structure of claim 1, wherein a length of the first doped region is greater than a distance between the capacitor and the first via structure.

3. The semiconductor structure of claim 1, further comprising a second doped region under the first doped region and separated from the first doped region.

4. The semiconductor structure of claim 3, wherein the first doped region and the second doped region comprise dopants of a same type.

5. The semiconductor structure of claim 1, further comprising a second doped region disposed between the first doped region and the first via structure, wherein a width of the second doped region is less than a width of the first doped region.

6. The semiconductor structure of claim 5, wherein the first doped region and the second doped region comprise dopants of a same type, and the second doped region is separated from the first doped region.

7. The semiconductor structure of claim 6, wherein a dopant concentration of the second doped region is greater than a dopant concentration of the first doped region.

8. The semiconductor structure of claim 6, further comprising a third doped region between the first doped region and the second doped region, wherein the third doped region comprises dopants complementary to dopants in the first doped region and the second doped region.

9. The semiconductor structure of claim 1, further comprising a second doped region over the first doped region, wherein the first doped region and the second doped region comprise dopants complementary to each other, and the second doped region is in contact with the first doped region.

10. A semiconductor structure, comprising: an interposer substrate having a first surface and a second surface opposite to the first surface;a capacitor disposed in the interposer substrate over the first surface;an interconnect structure disposed over the first surface of the interposer substrate, wherein the interconnect structure comprises a via structure coupled to the interposer substrate;a first through via structure penetrating the interposer substrate from the first surface to the second surface and electrically connected to the capacitor;a second through via structure penetrating the interposer substrate from the first surface to the second surface, electrically connected to the capacitor, and separated from the first through via structure; anda barrier structure disposed in the interposer substrate and under the via structure, wherein the barrier structure comprises at least a doped region.

11. The semiconductor structure of claim 10, further comprising: a first conductor disposed over the second surface of the interposer substrate and electrically connected to the first through via structure; anda second conductor disposed over the second surface of the interposer substrate and electrically connected to the second through via structure.

12. The semiconductor structure of claim 10, wherein a width of the barrier structure is less than a distance between a sidewall of the capacitor and a sidewall of the first through via structure, or greater than the distance between the sidewalls of the capacitor and the sidewall of the first through via structure.

13. The semiconductor structure of claim 10, wherein the barrier structure comprises a first doped region and a second doped region, and the first doped region and the second doped region comprise dopants of a first type and are separated from each other.

14. The semiconductor structure of claim 13, wherein the barrier structure further comprises a third doped region between the first and second doped regions, and the third doped region comprises dopants of a second type complementary to the first type.

15. The semiconductor structure of claim 10, wherein the barrier structure comprises a first doped region and a second doped region, the first doped region comprises dopants of a first type, the second doped region comprises dopants of a second type complementary to the first type, and the first doped region is in contact with the second doped region.

16. The semiconductor structure of claim 10, wherein the via structure of the interconnect structure and the first through via structure are electrically connected.

17. A method for forming a semiconductor structure, comprising: receiving a substrate having a first surface and a second surface opposite to the first surface;forming a barrier structure in the substrate near the first surface;forming a capacitor in the substrate over the first surface;forming an interconnect structure over the first surface of the substrate, wherein the interconnect structure comprises a first via structure coupled to the substrate, and a second via structure coupled to the capacitor; andforming at least a through via structure penetrating the substrate from the second surface to the first surface, wherein the through via structure is electrically connected to the interconnect structure.

18. The method of claim 17, wherein the forming of the barrier structure comprises forming a doped region in the substrate, and the doped region comprises p-type dopants or n-type dopants.

19. The method of claim 17, wherein the forming of the barrier structure comprises forming a first doped region in the substrate and a second doped region over the first doped region.

20. The method of claim 19, wherein the forming of the barrier structure further comprises forming a third doped region between the first doped region and the second doped region.