Patent Application
20100200888
The present disclosure relates to a silicon-based sub-mount for an optoelectronic device.
Optoelectronic devices, such as light emitting diodes (LEDs), have various applications in consumer electronics. High-brightness LEDs, for example, can be used as light sources in space-limited applications where thermal management is important. The LEDs are optimized for display backlighting and illumination in automotive and transport, consumer, and general applications. Typical end-products include mobile telephone displays, flashes for cameras, retail and window displays, emergency lighting and signs, household appliances, and automotive instrument panels and exterior lighting, such as brake lights and turn signals.
Some high brightness LED packages are ceramic-based or employ plastic leadless chip carriers (PLCCs). Silicon-based packages, however, can facilitate manufacturing of the packages by leveraging mature silicon processing techniques.
In one example, a LED chip is mounted within a recess of a silicon sub-mount. The recess serves as a reservoir that can be filled with a color-conversion material (e.g., phosphor silicone) to control the color of the light emitted from the package.
Some high-power LED white light applications, however, do not require a reservoir for a color-conversion material and, thus, can be mounted on a planar sub-mount. In a particular example, a package includes an optoelectronic device mounted on or integrated in the front-side of a planar semiconductor (e.g., silicon) structure having a thickness of about 200 μm or less. Packages with such thin sub-mounts can be advantageous for some applications, but typically require special handling during the manufacturing process to avoid their becoming damaged.
The details of one or more implementations of the invention are set forth in the accompanying drawings and the description below. Various aspects of the invention are set forth in the claims.
In one aspect, for example, a package for an optoelectronic device (e.g., a light emitting device such as a LED) includes a sub-mount including a silicon substrate having a thickness in the range of 350 μm-700 μm, and preferably in the range of 400 μm-600 μm. Sub-mounts having a relatively thick substrate (e.g., 350-700 μm) are less prone to damage and can result in a higher manufacturing yield. Such sub-mounts also can be manufactured using a simpler process compared to thinner sub-mounts because carrier wafers for mechanical support are not needed during the fabrication process.
The optoelectronic device can be mounted on a die attach pad on the front-side surface of the substrate. Feed-through metallization in one or more via structures electrically couples the die attach pad to a contact pad on the back-side surface of the substrate.
Each via structure for the feed-through metallization extends through the substrate from the front-side surface to the back-side surface and has inclined walls such that a cross-section of the via structure becomes increasingly narrower in a direction into the substrate from both the front-side and back-side surfaces. In some implementations, each via structure has a cross-section shaped like two substantially regular trapezoids, one atop the other and inverted with respect to one another.
Anode and cathode contact pads on the front-side surface of the substrate can be coupled electrically to surface mount device (SMD) pads on the back-side surface by way of feed-through metallization extending through via structures as mentioned above.
Other features and various advantages of the invention will be apparent from the description and drawings, and from the claims.
As shown in
As shown in
Via structures 24A, 24B extend from the front side to the back side of the substrate 12. Feed-through metallization in the via structures 24A, 24B provides electrical connections between the anode and cathode pads 18, 20 on the front side of the sub-mount 10 to respective SMD pads located on the back side of the sub-mount. In the illustrated example, two via structures 24A are provided for electrical connection from the anode 18, and two via structures 24B are provided for electrical connection from the cathode 20. In some implementations, a single via structure for the anode connection and a single via structure for the cathode connection may be sufficient. However, using multiple via structures with feed-through metallization for each of the anode and cathode can increase the amount of current that can be handled.
In the illustrated example, the die attach pad 16 covers an area of about 1050 μm×1050 μm, and the area of the front side of the sub-mount is about 2800 μm×2800 μm. Different dimensions may be suitable for other implementations.
The distance between the die attach pad on the front-side surface and the SMD and thermal pads on the back-side surface is approximately the thickness of the silicon substrate.
An example of a process for fabricating the sub-mount 10 is described in the following paragraphs. As noted above, the sub-mount can be fabricated, for example, in a wafer-level batch process using standard 4-inch to 8-inch diameter silicon wafers. However, for ease of understanding, the process is described with respect to processing a portion of the wafer for a single sub-mount.
As shown in
Next, a relatively thick (e.g., 1200 nm) thermally-grown SiO2 isolation layer is formed over the front side (i.e., LED side) of the wafer. The relatively thick thermally-grown oxide layer forms on the silicon, but not on the previously-formed thin SiO2 membrane.
A thin (e.g., sub-micron) metal film 46 then is deposited on the back side (i.e., SMD side) of the wafer (see
Next, the oxide layers are etched from the front side (i.e., LED side) of the wafer. The duration of the oxide etch should be just long enough to remove the thin (400 nm) SiO2 membrane 44 previously formed in the vias, thereby exposing the thin metal film in the vias. As the duration of the oxide etch results in removal of only about 400 nm of oxide, approximately 800 nm of oxide remains on the other surfaces of the wafer to provide electrical isolation.
A thin (e.g., sub-micron) film 48 is deposited over the front side (i.e., LED side) of the wafer to form a metallic interface (e.g., ohinic contact) inside each via structure. The thin film 48 can be, for example, AlCu/Ti/Au.
Next, a thin electroplated film (e.g., about 3 μm of Au) is deposited to form the die attach pad 16 and the anode and cathode pads 18, 20. This thin film also can be deposited inside the vias to add mechanical strength to the feed-through connections. Metallization on the front and back sides of the wafer then is patterned to form other features, such as the SMD pads 32 and the thermal pad 30.
As shown in
Various details of the foregoing process flow can be modified to obtain the same or similar structure of the sub-mount 10 described in connection with
Using a planar silicon sub-mount as described above can result in the feed-through metallization being closer to the die attach pad. This, in turn, means that the sub-mount can have a smaller footprint compared, for example, to sub-mounts based on ceramic or leadframe technologies. A decrease in the footprint of the sub-mount can be particularly important for mobile phone and other applications where volume, and particularly height, should be as small as feasible.
Furthermore, the ability to use relatively large (e.g., 8-inch diameter) silicon wafers that contain many more dies as compared, for example, to a typical 4-inch ceramic tile can result in more cost-effective manufacturing and assembly.
As noted above, sub-mounts having a relatively thick substrate (e.g., 350-700 μm) are less prone to damage and can result in a higher manufacturing yield. Such sub-mounts also can be manufactured using a simpler process because carrier wafers for mechanical support are not needed during the fabrication process.
Various modifications may be made to the implementations described above without departing from the spirit and scope of the invention. Accordingly, other implementations are within the scope of the claims.
