Claims
- 1. A microelectronic device, comprising:
a substrate; a semi-insulating silicon carbide layer formed on the substrate; and a first semiconductor device formed on the semi-insultaing silicon carbide layer.
- 2. The device of claim 1, wherein the semi-insulating silicon carbide layer is formed epitaxially.
- 3. The device of claim 2, wherein the semi-insulating silicon carbide layer comprises boron.
- 4. The device of claim 2, wherein the semi-insulating silicon carbide layer comprises a transition metal.
- 5. The device of claim 3, wherein the first semiconductor device is a high frequency device.
- 6. The device of claim 4, wherein the first semiconductor device is a high power device.
- 7. The device of claim 1, wherein the substrate is a conductor.
- 8. The device of claim 1, wherein the substrate comprises n+ silicon carbide.
- 9. The device of claim 1, wherein the semi-insulating silicon carbide layer comprises 6H silicon carbide.
- 10. The device of claim 1, wherein the semi-insulating silicon carbide layer comprises 4H silicon carbide.
- 11. The device of claim 1, wherein the first semiconductor device comprises silicon carbide.
- 12. The device of claim 1, wherein the first semiconductor device comprises a metal-oxide-semiconductor field effect transistor.
- 13. The device of claim 1, wherein the first semiconductor device comprises a lateral metal-oxide-semiconductor field effect transistor.
- 14. The device of claim 1, wherein the first semiconductor device comprises a bipolar junction transistor.
- 15. The device of claim 1, wherein the first semiconductor device comprises a junction field effect transistor.
- 16. The device of claim 1, further comprising:
at least a second semiconductor device.
- 17. The device of claim 16, wherein the at least a second semiconductor device is found on a portion of the substrate that is physically isolated from the first semiconductor device.
- 18. The device of claim 16, wherein the at least a second semiconductor device is found on a portion of the substrate that is electrically isolated from the first semiconductor device.
- 19. The device of claim 1, wherein the first semiconductor device is formed epitaxially.
- 20. A method for forming a microelectronic device, comprising:
forming a semi-insulating silicon carbide layer on a substrate; and forming a first semiconductor device on the semi-insulating silicon carbide layer.
- 21. The method of claim 20, wherein the substrate is a conductor.
- 22. The method of claim 21, wherein the semi-insulating silicon carbide layer is formed epitaxially.
- 23. The method of claim 20, wherein the semi-insulating silicon carbide layer comprises boron.
- 24. The method of claim 20, wherein the semi-insulating silicon carbide layer comprises a transition metal.
- 25. The method of claim 20, wherein the semi-insulating silicon carbide is formed using site competition epitaxy.
- 26. The method of claim 20, wherein forming a semi-insulating silicon carbide layer comprises:
providing a source of silicon; providing a source of carbon; and varying a relative concentration of the silicon to the carbon, such that site competition epitaxy occurs.
- 27. The method of claim 20, wherein the semi-insulating silicon carbide layer is formed using boron nitride.
- 28. The method of claim 20, wherein the semi-insulating silicon carbide layer is formed using diborane.
- 29. The method of claim 20, wherein forming a semi-insulating silicon carbide layer comprises:
supplying a transition metal from a source, wherein the source is selected from a group consisting of a solid source, an organometallic liquid, and a non-organic gas.
- 30. The method of claim 29, wherein the solid source comprises one selected from a group consisting of vanadium nitride and vanadium carbide.
- 31. The method of claim 20, wherein forming the semi-insulating silicon carbide layer comprises:
supplying an impurity from a source, the impurity being selected from a group consisting of germanium and chromium.
- 32. The method of claim 20, wherein the first semiconductor device is formed epitaxially.
- 33. The method of claim 20, wherein the semi-insulating silicon carbide layer has a thickness and a leakage current, the leakage current varying as a function of the thickness and a voltage applied to the microelectronic device.
- 34. The method of claim 33, wherein the leakage current varies as a function of V2/L3, where V=the voltage applied and L=the thickness of the semi-insulating silicon carbide layer.
- 35. The method of claim 34, wherein the thickness is at least about 10 micrometers for the voltage of about 350 Volts.
- 36. The method of claim 20, wherein the semi-insulating silicon carbide layer is formed such that the semi-insulating silicon carbide layer has much greater thermal conductivity than a silicon-dioxide layer.
- 37. The method of claim 20, wherein the semi-insulating silicon carbide layer is formed such that the semi-insulating silicon carbide layer conducts more than 200 times as much heat as a silicon-dioxide layer per unit area.
Parent Case Info
[0001] This application claims priority from U.S. Provisional Patent Application Serial No. 60/259,207 filed Jan. 3, 2001. The entirety of that provisional application is incorporated herein by reference.
Provisional Applications (1)
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Number |
Date |
Country |
|
60259207 |
Jan 2001 |
US |