Stress-isolated MEMS device comprising substrate having cavity and method of manufacture

Information

  • Patent Grant
  • 11981560
  • Patent Number
    11,981,560
  • Date Filed
    Tuesday, June 8, 2021
    3 years ago
  • Date Issued
    Tuesday, May 14, 2024
    a month ago
Abstract
A stress-isolated microelectromechanical systems (MEMS) device and a method of manufacture of the stress-isolated MEMS device are provided. MEMS devices may be sensitive to stress and may provide lower performance when subjected to stress. A stress-isolated MEMS device may be manufactured by etching a trench and/or a cavity in a first side of a substrate and subsequently forming a MEMS device on a surface of a platform opposite the first side of the substrate. Such a stress-isolated MEMS device may exhibit better performance than a MEMS device that is not stress-isolated. Moreover, manufacturing the MEMS device by first forming a trench and cavity on a backside of a wafer, before forming the MEMS device on a suspended platform, provides increased yield and allows for fabrication of smaller parts, in at least some embodiments.
Description
FIELD OF THE DISCLOSURE

The present disclosure relates to stress-sensitive micro-scale devices, such as sensors.


BACKGROUND

There are various types of microelectromechanical systems (MEMS) devices. Some MEMS devices comprise sensors, for example, gyroscopes, accelerometers, or pressure sensors.


MEMS devices may be sensitive to stress. For example, when there is a stress in a substrate upon which a MEMS sensor is disposed, the MEMS sensor may provide different performance and/or output than if there was not a stress in the substrate.


SUMMARY OF THE DISCLOSURE

A stress-isolated microelectromechanical systems (MEMS) device and a method of manufacture of the stress-isolated MEMS device are provided. MEMS devices may be sensitive to stress and may provide lower performance when subjected to stress. A stress-isolated MEMS device may be manufactured by etching a trench and/or a cavity in a first side of a substrate and subsequently forming a MEMS device on a surface of a platform opposite the first side of the substrate. Such a stress-isolated MEMS device may exhibit better performance than a MEMS device that is not stress-isolated. Moreover, manufacturing the MEMS device by first forming a trench and cavity on a backside of a wafer, before forming the MEMS device on a suspended platform, provides increased yield and allows for fabrication of smaller parts, in at least some embodiments.


According to some aspects of the present application, a method of manufacture of a stress-isolated microelectromechanical systems (MEMS) device is provided. The method comprises providing a substrate having a first side and a second side opposite the first side, etching a trench in the first side of the substrate, forming a platform adjacent to and substantially surrounded by the trench, and forming a MEMS device on a surface of the platform opposite the first side of the substrate.


In some embodiments, etching the trench comprises defining a plurality of tethers at locations configured to connect the platform to a periphery of the substrate.


In some embodiments, forming the MEMS device on the surface of the platform comprises forming the MEMS device to include a movable sensing mass having a thickness of approximately 8 microns or greater.


In some embodiments, forming the platform further comprises etching a cavity in the first side of the substrate prior to etching the trench, and forming the trench such that the cavity laterally extends at least to the trench.


In some embodiments, the method further comprises etching the cavity to a first depth and etching the trench to a second depth greater than the first depth.


In some embodiments, the substrate comprises a first substrate, and the method further comprises, after etching the trench and after etching the cavity, bonding a second substrate to the first substrate, over the cavity and the trench, to form a sealed cavity. In some such embodiments, the method further comprises thinning the second substrate such that the stress-isolated MEMS device has a thickness of less than approximately 500 microns.


According to some aspects of the present disclosure, a stress-isolated microelectromechanical systems (MEMS) device is provided. The stress-isolated MEMS device comprises a substrate, a suspended platform defined at least in part within the substrate, and a MEMS device disposed on the suspended platform, wherein the MEMS device and suspended platform have a combined thickness of less than approximately 500 microns. Achieving such small dimensions may be facilitated by the methods described herein for forming a stress-isolated MEMS device.


In some embodiments, the MEMS device comprises a movable sensing mass having a thickness of approximately 8 microns or greater.


In some embodiments, the stress-isolated MEMS device further comprises a plurality of tethers connecting the suspended platform to a peripheral region of the substrate, and further comprises an electrical connection between the suspended platform and the peripheral region that does not align with any of the plurality of tethers. In some such embodiments, the electrical connection is formed of polysilicon.


In some embodiments, the stress-isolated MEMS device further comprises a cavity formed under the suspended platform, the substrate comprises a first substrate, and the stress-isolated MEMS device further comprises a second substrate bonded to the first substrate such that the cavity is disposed between the suspended platform and the second substrate.


In some embodiments, the stress-isolated MEMS device further comprises a trench encircling the platform.


According to some aspects of the present disclosure, there is provided a method of forming a stress-isolated microelectromechanical systems (MEMS) device. The method comprises defining a suspended platform at least in part by backside etching a wafer, the backside etching defining a plurality of tethers positioned to connect the suspended platform to a peripheral region and forming the MEMS device on a front side of the suspended platform.


In some embodiments, backside etching of the wafer comprises forming a trench in the wafer, and the method further comprises forming a jumper spanning the trench and not aligned with any of the plurality of tethers. In some such embodiments, forming the MEMS device comprises forming a movable sensing mass, and forming the electrical connection comprises forming the electrical connection from a common layer with the movable sensing mass.


In some embodiments, the wafer is a first wafer, and the method comprises bonding the first wafer and a second wafer prior to backside etching the first wafer, removing the second wafer from the first wafer subsequent to backside etching the first wafer, and bonding the first wafer to a third wafer prior to forming the MEMS device on the front side of the suspended platform.


In some embodiments, forming the stress-isolated MEMS device comprises defining a thickness of the MEMS device and of the wafer to be less than 500 microns total.


In some embodiments, the wafer is a first wafer, and the method further comprises bonding a cap wafer to the first wafer.


In some embodiments, backside etching of the wafer comprising a first etch defining a cavity and a second etch defining a trench through a portion of the cavity.





BRIEF DESCRIPTION OF THE DRAWINGS

Various aspects and embodiments of the application will be described with reference to the following figures. It should be appreciated that the figures are not necessarily drawn to scale. Items appearing in multiple figures are indicated by the same reference number in all the figures in which they appear.



FIG. 1 shows a cross-sectional view of a stress-isolated MEMS device;



FIGS. 2A-2E show cross-sectional views of steps of a manufacturing process of a stress-isolated MEMS device;



FIG. 3 shows a cross-sectional view of a step of a manufacturing process of multiple stress-isolated devices;



FIG. 4 shows a process flow of a method of manufacture of a stress-isolated MEMS device;



FIG. 5 shows a process flow of a method of manufacture of a stress-isolated MEMS device;



FIG. 6 shows a top view of some elements of a stress-isolated MEMS device;



FIG. 7 shows a first detail top view of some elements of a stress-isolated MEMS device illustrated in FIG. 6;



FIG. 8 shows a second detail top view of some elements of a stress-isolated MEMS device illustrated in FIG. 6;



FIG. 9 shows an automobile that may include a stress-isolated device of one of the types described herein; and



FIG. 10 shows a piece of industrial equipment on which are disposed three stress-isolated devices of the types described herein.





DETAILED DESCRIPTION

According to some aspects of the present disclosure, a stress-isolated MEMS device and a method of manufacture of the stress-isolated MEMS device are provided. The inventors have recognized that MEMS devices may be sensitive to stress so that when there is a stress in a substrate upon which a MEMS device is disposed, the MEMS device may provide different output than if the substrate was not under stress. The inventors have further recognized that a stress-isolated MEMS device may be manufactured by etching a stress-isolation trench and/or a stress-isolation cavity on a backside of a substrate using a backside etch process, sealing the cavity, and then forming a MEMS device on a surface of a platform representing a frontside of the substrate. Such a method of manufacture of a stress-isolated MEMS device may provide various benefits.


According to various aspects of the present disclosure, such a manufacturing process may provide stress-isolated MEMS devices having a greater thickness of MEMS layers (which may result in higher sensitivity of devices), having a smaller overall size (for example, a smaller thickness), and/or having a lower cost. For example, according to some conventional methods of manufacturing a MEMS device, a cavity is not sealed between an isolation substrate and a handle substrate. The inventors have recognized that because a cavity may be sealed between an isolation substrate and a handle substrate, thinning the handle substrate may provide a device having a smaller thickness, which may further allow a greater thickness MEMS, compared to devices manufactured by conventional methods. Furthermore, such a process results in a greater manufacturing yield than alternative approaches, in at least some embodiments.


According to some aspects of the present disclosure, such an improved manufacturing process may also provide greater electrical connectivity for a MEMS device, for example, because a MEMS process is performed after the trench and/or cavity are formed. According to some conventional methods of manufacturing a stress-isolated MEMS device, trenches are etched from a front side of a substrate that the MEMS device is disposed on. In some implementations of such a conventional manufacturing method, jumpers electrically coupling the MEMS device and a peripheral region of the substrate cannot be used, because the jumpers would be etched away when the trenches are etched. Instead, such conventional methods can be reliant on electrical conductors formed on tethers, the tethers coupling the platform to the peripheral region of the substrate. Because the size and number of tethers should be small enough to isolate the platform from the substrate stress, relying on electrical conductors formed on the tethers can severely limit the number of electrical connections that may be made to the MEMS device. The inventors have recognized that forming trenches using a backside etch process may allow jumpers to be formed by a frontside process after the trenches are etched and after the substrate is flipped. These jumpers may provide a greater number of electrical couplings between the MEMS device and the peripheral region of the substrate than if only electrical conductors on tethers were used, thereby increasing the electrical connectivity of the MEMS device.


A MEMS device may be disposed on a substrate. In some implementations, a substrate upon which a MEMS device is disposed may experience stress. In some implementations, a MEMS device, such as a sensor, disposed on a substrate experiencing stress may also experience stress. A MEMS device such as a sensor experiencing stress may exhibit lower performance, for example, reduced accuracy and/or precision. In various implementations, stress that a substrate experiences may comprise packaging stress, thermal stress, and/or other stresses.


The inventors have recognized that it may be advantageous to provide a stress-isolated MEMS device and a method of manufacture of the stress-isolated MEMS device. A stress-isolated MEMS device may reduce or substantially eliminate the lower performance, for example, the reduction in accuracy and/or precision, caused by stress.


According to aspects of the present disclosure a stress-isolated MEMS device may include one or more stress-isolation features. A stress-isolation feature may include a stress-isolation gap, a trench, a cavity, a tether, a jumper or an electrical conductor, among other possibilities.


Such a stress-isolated MEMS device and its stress-isolation features may be formed using a suitable process, including a backside etch to create a cavity above which a platform may be suspended to support the MEMS device. For example, a substrate may be provided. The substrate may have a first side and a second side opposite the first side. A trench and/or a cavity may be etched from the first side of the substrate. The first side represents a backside of the substrate, in at least some embodiments. A platform may be formed adjacent to and/or substantially surrounded by the trench. For example, a suspended platform may be formed at least in part by backside etching a wafer. The backside etching may define a plurality of tethers positioned to connect the suspended platform to a peripheral region, A MEMS device may be formed on a surface of the platform opposite the first side of the substrate. For example, the MEMS device may be formed on a front side of a suspended platform.



FIG. 1 illustrates anon-limiting example of a stress-isolated MEMS device 100 according to an aspect of the present application. As shown, the stress-isolated MEMS device 100 comprises device substrate 102, MEMS layer 124, and a cap 132. Device substrate 102 comprises isolation substrate 104 and handle substrate 116. Device substrate 102 comprises platform 120 and peripheral region 122. Device substrate 102 includes a stress-isolation gap. A stress-isolation gap may comprise cavity 112 and at least one trench 114. A first oxide layer 108a is formed on isolation substrate 104. At least one routing layer 118 (for example, a single layer or two or more layers) is formed on the first oxide layer 108a. An additional oxide layer 108e is formed on the routing layer 118. The MEMS layer 124 may be formed on the additional oxide layer 108e. The MEMS layer 124 comprises MEMS device 126 and a jumper 130. The MEMS device 126 comprises at least one movable beam 128. The cap 132 is bonded to the MEMS layer 124 with cap seal 134.


A method of manufacturing a stress-isolated MEMS device 100 according to some aspects of the present disclosure is provided. Initially, two substrates may be bonded together, representing an isolation substrate and a sacrificial substrate. As shown in the illustrative embodiment of FIG. 2A, an isolation substrate 104 may be provided. In some embodiments, a first oxide layer 108a is formed on a front side 140 of isolation substrate 104 and a second oxide layer 108b is formed on a back side 142 of isolation substrate 104. A first nitride layer 110a may be formed on the first oxide layer 108a and a second nitride layer 110b may be formed on the second oxide layer 108b.


As further shown in the illustrative embodiment of FIG. 2A, a sacrificial substrate 106 may be provided. In some embodiments, a third oxide layer 108c may be formed on a first side of the sacrificial substrate 106 and a fourth oxide layer 108d may be formed on a second side of the sacrificial substrate 106.


In some embodiments, isolation substrate 104 may be bonded to sacrificial substrate 106 and annealed. In some embodiments, isolation substrate 104 may be bonded to sacrificial substrate 106 such that first nitride layer 110a of isolation substrate 104 is bonded to third oxide layer 108c of sacrificial substrate 106.


According to aspects of the present disclosure, some steps of the method of manufacture may be performed as backside processes. For example, a trench and/or a cavity may be formed by a backside process. Prior to the step illustrated in FIG. 2B, the second oxide layer 108b and the second nitride layer 110b on the back side 142 of the isolation substrate 104 may be removed (e.g., etched, stripped, or otherwise removed). As shown in the illustrative embodiment of FIG. 2B, a cavity 112 may be formed in isolation substrate 104, for example, by etching. In some embodiments, at least one trench 114 may be formed in isolation substrate 104, for example, by etching. In some embodiments, trench 114 is etched through a portion of cavity 112. In some embodiments, a trench 114 may be formed as a through silicon via (TSV) by patterning and etching the isolation substrate 104. In some embodiments, cavity 112 and at least one trench may be formed on back side 142 of isolation substrate 104. In some embodiments, the cavity 112 may be formed to extend to a first depth D1 into the isolation substrate 104 and the trench may be formed to extend a second depth D2 into isolation substrate 104, where the second depth D2 is greater than the first depth D1. The cavity 112 may laterally extend (for example, extend parallel to the back side 142 of isolation substrate 104) at least to the trench 114. In some embodiments, the cavity 112 may laterally extend beyond the trench 114, for example, as illustrated in FIG. 2B. In some embodiments, trench 114 may be formed to encircle cavity 112. In some embodiments, trench 114 is formed at approximately a perimeter of cavity 112. In some embodiments, such as that shown in FIG. 2B, cavity 112 extends laterally beyond trench 114. Cavity 112 and trench 114 may be formed by etching isolation substrate 104 using a backside etch process.


According to aspects of the present disclosure, the cavity formed in the backside of a substrate may be sealed. For example, a cavity may be sealed between an isolation wafer and a handle wafer. As shown in the illustrative embodiment of FIG. 2C, a handle substrate 116 may be provided. In some embodiments, the handle substrate 116 may be bonded to the isolation substrate 104 and annealed. In some embodiments, the handle substrate 116 may be bonded to the isolation substrate 104 over the cavity 112 and the at least one trench 114, and may seal the cavity 112 and/or trench 114. The handle substrate 116 may be formed of silicon or any other suitable material to serve as a handle.


According to aspects of the present disclosure, further processing may be on the frontside of the structure. For example, the backside processing may conclude, the substrate may be flipped, and further processing may proceed with frontside processes. As shown in the illustrative embodiment of FIG. 2D, the isolation substrate 104 and handle substrate 116 may be flipped. In some embodiments, the sacrificial substrate 106, and its third oxide layer 108c and fourth oxide layer 108d may be removed. In some embodiments, the remaining first nitride layer 110a of the isolation layer 104 may be removed, etching the isolation substrate 104 down to first oxide layer 108a. In some embodiments, the first nitride layer 110a may be removed with hot phosphoric acid.


According to aspects of the present disclosure, after a substrate has a trench and/or cavity formed by a backside etch process and has been flipped, MEMS-only processing may ensue. A MEMS-only process may comprise forming a MEMS device and/or forming jumpers that couple the MEMS device with a peripheral region of the substrate, and may use polysilicon. FIG. 2E may depicts the result of a MEMS-only process. In some embodiments, the MEMS process is performed on a side of the isolation substrate 104 opposite the side of isolation substrate 104 upon which cavity 112 and trench 114 are formed using the backside etch process. For example, a MEMS process may be performed on front side 140 of isolation substrate 104. As shown in the illustrative embodiment of FIG. 2E, at least one routing layer 118 may be patterned and formed on isolation substrate 104, for example, on the first oxide layer 108a of isolation substrate 104. In some embodiments, there may be a single routing layer, while in other embodiments, there may be two or more routing layers. In some embodiments, an additional oxide layer 108e may be patterned and formed on the routing layer 118. In some embodiments, a MEMS layer 124 may be patterned and formed on isolation substrate 104, for example, on the additional oxide layer 108e. The MEMS layer 124 may be patterned and formed to include a MEMS device 126 on platform 120 and a jumper extending across a trench 114, from the platform 120 to the peripheral region 122. The MEMS layer 124 may be patterned and formed such that MEMS device 126 includes at least one movable beam 128. MEMS layer 124 may be released, for example, by hydrogen fluoride vapor etching. The portions of first oxide layer 108a and additional oxide layer 108e extending across a trench 114 may be removed, for example, by hydrogen fluoride vapor etching. Performing the MEMS process on the side of the isolation substrate 104 opposite the side of isolation substrate upon which cavity 112 and trench 114 are formed using the backside etch process may allow jumpers 130 to be formed after trench 114 is etched. In embodiments where a backside etch is not used to form cavity 112 and trench 114, it may not be possible to form jumpers 130.


According to aspects of the present disclosure, MEMS device 126 may be sealed in the stress isolated MEMS device 100. For example, as shown in the illustrative embodiment of FIG. 1, a cap 132 may be bonded to the MEMS layer 124. In some embodiments, the cap 132 may be bonded to the MEMS layer 124 using cap seal 134. The cap 132 may seal the cavity 112 and the at least one trench 114.


According to aspects of the present disclosure, device size may be reduced by use of the fabrication methodology described herein. In some embodiments, device substrate 102 may be thinned, for by etching device substrate 102 opposite the side of the device substrate 102 upon which the MEMS device 126 is disposed. Thinning device substrate 102 may form a smaller device, and/or may allow a greater thickness of MEMS layer 124, which may provide enhanced performance of MEMS device 126. For example, when implementing a thinner device substrate, a thicker MEMS layer may be incorporated while maintaining a same overall thickness. In some embodiments, a thicker MEMS layer may provide larger movable beams and/or larger capacitive sensing elements. Larger movable beams or larger sensing elements may react more accurately or precisely to a measured parameter (for example, acceleration), thereby providing greater sensor performance (for example, greater resolution).


According to an aspect of the present application, multiple stress-isolated MEMS devices of the types described herein may be manufactured at once by wafer-level processing. For example, the steps of FIGS. 2A-2E may be performed at the wafer level, with the substrates of those figures being wafers. As a non-limiting example, the step of manufacture illustrated in FIG. 3 corresponds to the step of manufacture shown in FIG. 2D, except that FIG. 3 shows the formation of five separate, sealed cavities which may correspond to five, respective stress-isolated MEMS devices. Cavity 112a and at least one trench 114a correspond to a first stress-isolated MEMS device, cavity 112b and at least one trench 114b correspond to a second stress-isolated MEMS device, cavity 112c and at least one trench 114c correspond to a third stress-isolated MEMS device, cavity 112d and at least one trench 114d correspond to a fourth stress-isolated MEMS device, and cavity 112e and at least one trench 114e correspond to a fifth stress-isolated MEMS device. Thus, in this non-limiting illustration, it can be seen that multiple instances of the MEMS device may be manufactured at the same time at the wafer level. In other embodiments, any number of stress-isolated MEMS devices may be manufactured at one time. The devices may subsequently be diced to obtain individual stress-isolated MEMS devices.


As illustrated in FIG. 3, isolation substrate 104 may comprise a portion of an isolation wafer, and handle substrate 116 may comprise a portion of a handle wafer. While not illustrated in FIG. 3, sacrificial substrate 106 may comprise a portion of a sacrificial wafer and cap 132 may comprise a portion of a cap wafer.



FIG. 4 is a flowchart of an illustrative method 400 of manufacture of a stress-isolated MEMS device according to an aspect of the present application. The method 400 is consistent with the fabrication sequence of FIGS. 2A-2E and comprises step 402, step 404, step 406, and step 408. Step 402 comprises providing a substrate having a first side and a second side opposite the first side, for example, as shown in FIGS. 2A and 2B. Step 404 comprises etching a trench from the first side of the substrate, for example, as shown in FIG. 2B. Step 406 comprises forming a platform adjacent to and substantially surrounded by the trench, for example as shown in FIGS. 2B, 2C, 2D, and 2E. Step 408 comprises forming a MEMS device on a surface of the platform opposite the first side of the substrate, for example, as shown in FIG. 2E.



FIG. 5 shows an illustrative method of forming a stress-isolated MEMS device, comprising step 502 and step 504. Step 502 comprises defining a suspended platform at least in part by backside etching a wafer, the backside etching defining a plurality of tethers positioned to connect the suspended platform to a peripheral region, for example, as illustrated in FIGS. 2B, 2C, 2D, and 2E. Step 504 comprises forming the MEMS device on a front side of the suspended platform, for example, as shown in FIG. 2E.


In some embodiments, stress-isolated MEMS device 100 may comprise a stress-isolated sensor, such as a stress-isolated gyroscope, a stress-isolated accelerometer, a stress-isolated pressure sensor, or another stress-isolated sensor. For example, MEMS device 126 may comprise a sensor such as a gyroscope, accelerometer, pressure sensor, or other sensor. Movable beam 128 may comprise a movable portion of such a gyroscope, accelerometer, pressure sensor or other sensor. For example, movable beam 128 may comprise a movable sensing mass. For example, in an embodiment where stress-isolated MEMS device 100 comprises a stress-isolated accelerometer, MEMS device 126 may comprise an accelerometer and movable beam 128 may be configured to move in response to an acceleration applied to the stress-isolated MEMS device 100. Other elements of the MEMS device 126 may sense the movement of movable beam 128 and an acceleration of the stress-isolated MEMS device 100 may be determined. For example, the movement of movable beam 128 may be sensed by sensing a change in capacitance between movable beam 128 and another element of MEMS device 126.


In some embodiments, stress-isolated MEMS device 100 may have a thickness of approximately 800 microns, less than approximately 800 microns, approximately 700 microns, less than approximately 700 microns, approximately 600 microns, less than approximately 600 microns, approximately 500 microns, less than approximately 500 microns, approximately 400 microns, less than approximately 400 microns, approximately 300 microns, less than approximately 300 microns, approximately 200 microns, or less than approximately 200 microns. In some embodiments, stress-isolated MEMS device 100 may have a thickness between approximately 100 and approximately 400 microns, between approximately 200 and approximately 400 microns, between approximately 300 and approximately 400 microns, between approximately 100 and less than approximately 500 microns, between approximately 200 and less than approximately 500 microns, between approximately 300 and less than approximately 500 microns. Achieving such small dimensions is facilitated by use of the manufacturing methods described herein, and may not be achieved with conventional manufacturing methods. Manufacturing a stress-isolated MEMS device 100 according to the methods described herein may provide a smaller device, and/or may provide a device having a greater thickness of MEMS layer 124, which may provide enhanced performance of MEMS device 126. According to aspects of the present application, forming a cavity between an isolated substrate and a handle substrate may allow the handle substrate to be thinned, thereby providing a device that is thinner than a conventionally-manufactured device, for example, a device where a cap is provided below a cavity. Providing a thinner substrate may allow a thicker MEMS layer to be provided in a package having a same overall thickness as a conventional device. Having a thicker MEMS layer may allow larger movable beams and/or larger capacitive sensing elements to be incorporated into a MEMS device. Larger movable beams or larger sensing elements may react more accurately or precisely to a measured parameter and provide greater sensor performance.


According to some aspects of the present disclosure, stress-isolated MEMS device comprises MEMS layer 124. MEMS layer 124, and therefore MEMS device 126, may have various thicknesses. In some embodiments, MEMS layer 124 may have a thickness of about 8 microns, greater than about 8 microns, about 16 microns, greater than about 16 microns, about 32 microns, or greater than about 32 microns. Increased thickness of MEMS device 126 may enhance performance of MEMS device 126. For example, in embodiments where MEMS device 126 comprises a sensor, a thicker sensor, for example, an about 32 microns sensor, may have greater performance and/or resolution than a thinner sensor. The method of manufacture of stress-isolated MEMS device 100 described herein may allow MEMS layer 124 to have a greater thickness. MEMS layer 124 may be formed of polysilicon. In some embodiments, MEMS layer 124 may be formed of other conductive layers, for example, metallic silicide or metals such as aluminum.


According to aspects of the present application, a substrate, such as device substrate 102, isolation substrate 104, sacrificial substrate 106, or handle substrate 116, cap 132, or a wafer, may comprise various materials. In some embodiments, a substrate, cap, or wafer may comprise a semiconductor material. For example, a substrate, cap, or wafer may comprise a bulk or monocrystalline semiconductor substrate, such as a bulk or monocrystalline silicon substrate. In some embodiments, a substrate, cap, or wafer may comprise a deposited semiconductor substrate, such as polycrystalline silicon. In some embodiments, a substrate, cap, or wafer may comprise a silicon-on-insulator (SOI) substrate or may comprise a buried oxide layer. Other semiconductor materials may be used as substrates or wafers. In some embodiments, a substrate, cap, or wafer may comprise a glass substrate or a printed circuit board (PCB).


In various embodiments, oxide layers, such as first oxide layer 108a, second oxide layer 108b, third oxide layer 108c, fourth oxide layer 108d, or additional oxide layer 108e, may be formed of any suitable dielectric.


As shown in the illustrative embodiments of FIG. 1, device substrate 102 includes a platform 120. The platform 120 may be a stress-isolation platform. The platform 120 may be surrounded by a peripheral region 122 of the device substrate 122, MEMS device 126 may be disposed on the platform 120.


The platform 120 may be separated from the peripheral region 122 by at least one stress-isolation feature. For example, in some embodiments, the platform 120 is separated laterally from the peripheral region 122 by at least one trench 114. The at least one trench 114 may encircle the platform 120. During a manufacturing process of a stress-isolated MEMS device, a trench 114 may be formed by etching the device substrate 102, for example, by etching from a side of the device substrate 102 opposite the surface of the platform 120 upon which MEMS device 126 is formed.


In some embodiments, substrate 102 includes a cavity 112. For example, platform 120 may be formed above a cavity 112. Cavity 112 may be formed in the substrate by a backside etch. In some embodiments, cavity 112 may be connected to at least one trench 114. In some embodiments, a cavity 112 is disposed between handle substrate 116 and platform 120.


In some embodiments, at least one of the stress-isolation features described herein may form a stress-isolation gap. For example, cavity 112 and at least one trench 114 may form a stress-isolation gap.


In some embodiments, a cavity may comprise a pre-formed cavity. A cavity may be sealed. For example, a substrate may comprise an SOI substrate having a pre-formed cavity. In some embodiments, a substrate having a pre-formed cavity may be formed from a silicon-silicon fusion wafer bond. In some embodiments, a substrate having a pre-formed cavity may have its cavity formed in a different facility than the facility in which the stress-isolated MEMS device is formed. In some embodiments, a substrate having a pre-formed cavity may have its cavity formed in a same facility as the facility in which the stress-isolated MEMS device is formed. In some embodiments, providing a cavity having a pre-formed cavity during a manufacturing process of a stress-isolated MEMS device may reduce cost, result in a smaller size, and/or increase yield of the stress-isolated MEMS devices.


In some embodiments, stress-isolated MEMS device 100 may comprise a routing layer 118, Routing layer 118 may be configured to transmit electrical signals between various elements of stress-isolated MEMS device 100. For example, routing layer 118 may be coupled to various elements of MEMS device 126, jumpers 130, electrical conductors 138, and/or devices external to stress-isolated MEMS device 100. In some embodiments, routing layer 118 may be formed of polysilicon. In some embodiments, routing layer 118 may be formed of other conductive layers, for example, metallic suicide or metals such as aluminum.


In some embodiments, stress-isolated MEMS device 100 includes a cap 132. In some embodiments, cap 132 may be disposed above the platform 120. For example, cap 132 may enclose the MEMS device 126. Cap 132 may be bonded to the stress-isolation MEMS device 100 using cap seal 134.



FIG. 6 illustrates a top view of some elements of stress-isolated MEMS device 100. For example, FIG. 6 shows isolation substrate 104, trenches 114, platform 120, peripheral region 122, MEMS device 126, jumpers 130, tethers 136, and electrical conductors 138. For ease of understanding, FIG. 6 does not illustrate other elements of stress-isolated MEMS device 100.



FIG. 7 illustrates a first detail top view of the elements of stress-isolated MEMS device 100 illustrated in FIG. 6. As shown in detail A, FIG. 7 shows isolation substrate 104, trenches 114, platform 120, peripheral region 122. MEMS device 126, tethers 136, and electrical conductors 138. For ease of understanding, FIG. 7 does not illustrate other elements of stress-isolated MEMS device 100.



FIG. 8 shows a second detail top view of some elements of a stress-isolated MEMS device illustrated in FIG. 6. As shown in detail B, FIG. 8 shows isolation substrate 104, trench 114, platform 120, peripheral region 122, and jumper 130. As shown in FIG. 8, jumpers 130 include flexible portions 130a, and openings 130b. For ease of understanding, FIG. 8 does not illustrate other elements of stress-isolated MEMS device 100.


Stress-isolated MEMS device 100 comprises at least one tether 136. In some embodiments, the at least one tether couples the platform 120 to the peripheral region 122, A tether 136 may extend across the at least one trench 114. In some embodiments, a tether 136 does not include a straight path across the at least one trench 114. For example, as shown in FIG. 7, a tether may include a first portion and a second portion arranged at an angle to each other, such as a right angle. In some embodiments, the tether 136 is flexible. For example, tether 136 may be flexible to stresses in the substrate 102. In some embodiments, tether 136 may be stiff to a parameter that MEMS device 126 is configured to measure. During a manufacturing process of stress-isolated MEMS device 100, a tether 136 may be formed by patterning a backside etch of isolation substrate 104 such that a portion of the isolation substrate 104 is left unetched. In some embodiments, a tether 136 and at least one trench 114 may be formed in a same etch, for example, a same backside etch.


In some embodiments, stress-isolated MEMS device 100 includes an electrical conductor 138. In other embodiments, stress-isolated MEMS device 100 may not comprise any electrical conductors 138. In some embodiments, an electrical conductor 138 is disposed on a tether 136. In some embodiments, an electrical conductor may be formed in a different layer than a layer in which a bridge is formed, for example, in routing layer 118. In some embodiments, an electrical conductor 138 is configured to couple an electrical signal from the platform 120 to the peripheral region 122. For example, electrical conductor may be coupled to MEMS device 126. In some embodiments, the electrical conductor 138 is flexible. For example, electrical conductor 138 may be flexible to stresses in the substrate 102.


In some embodiments, stress-isolated MEMS device may comprise at least one juniper 130. In other embodiments, stress-isolated MEMS device 100 may not comprise any jumpers 130, In some embodiments, a jumper 130 may be formed in a different layer than a layer in which a tether 136 is formed, for example, in MEMS layer 124. Accordingly, in some embodiments, a jumper 130 may be formed of polysilicon other conductive layers, for example, metallic silicide or metals such as aluminum. Jumpers 130 may be not aligned with tethers 136. For example, as shown in FIG. 6, jumpers 130 are not formed above tethers 136. A jumper 130 may form an electrical connection between platform 120 and peripheral region 122, For example, in some embodiments, a jumper 130 is configured to couple an electrical signal from the platform 120 to the peripheral region 122, For example, juniper 130 may be coupled to MEMS device 126. In some embodiments, the jumper 130 may span the at least one trench 114. In some embodiments, the jumper 130 is flexible. For example, juniper 130 may be flexible to stresses in the substrate 102. As shown in FIG. 8, jumper 130 may include one or more flexible portions 130a. In some embodiments, flexible portion 130a may absorb stress applies to jumper 130. In addition, jumper 130 may include openings configure to provide flexibility of the jumper 130, such as openings 130b.



FIG. 9 illustrates a non-limiting example in which at least one stress-isolated device, such as a stress-isolated sensor, of the types described herein is employed in a car. In the example of FIG. 9, an automobile 900 includes a control unit 902 coupled to an onboard computer 904 of the car by a wired or wireless connection. Control unit 902 may include at least one stress-isolated device, such as a stress-isolated sensor, of the types described herein. As a non-limiting example, a stress-isolated device may comprise at least one accelerometer that may sense accelerations in the driving direction and/or direction perpendicular to the driving direction. The at least one accelerometer may also be configured to sense vertical accelerations, which may be useful to monitor the status of a suspension of the automobile 900, for example. The control unit 902 may receive power and control signals from the onboard computer 904 and may supply output signals of the type described herein to the onboard computer 904.



FIG. 10 illustrates a system 1000 including three stress-isolated devices, such as stress-isolated sensors of one or more of the types described herein. For example, the stress-isolated devices 1002a, 1002b, and 1002c may each comprise single-axis MEMS accelerometers coupled to a piece of industrial equipment 1004. The equipment 1004 may be a motor, although this is a non-limiting example. The stress-isolated devices 1002a, 1002b, and 1002c may be coupled to the equipment and configured to monitor vibration of the equipment with respect to a respective axis. For example, stress-isolated device 1002a may be oriented to detect z-axis acceleration, stress-isolated device 1002b y-axis acceleration, and stress-isolated device 1002c x-axis acceleration. In an alternative embodiment, two or more of the stress-isolated devices 1002a, 1002b, and 1002c may be combined into a single package or housing, as opposed to the illustrated configuration of three distinct housings. The system may wirelessly communicate acceleration data generated by the respective accelerometer. Energy to power the stress-isolated device may be harvested from the vibration of the equipment 1004. Other configurations are possible.


Various aspects of the present application may provide one or more benefits. Some examples are now listed. It should be appreciated that not all aspects necessarily provide all benefits and benefits other than those listed may be provided by one or more aspects. According to some aspects of the present application, stress-isolation of devices, such as sensors and/or MEMS devices is provided. The stress-isolated devices may have a greater thickness of MEMS layers (which may result in higher sensitivity of devices), have a smaller size (fir example, a smaller thickness), have greater electrical connectivity, have a lower cost, or have a greater yield. In some embodiments, stress-isolation may be particularly beneficial at high temperatures or in high acceleration environments.


Having thus described several aspects and embodiments of the technology of this application, it is to be appreciated that various alterations, modifications, and improvements will readily occur to those of ordinary skill in the art. Such alterations, modifications, and improvements are intended to be within the spirit and scope of the technology described in the application. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, inventive embodiments may be practiced otherwise than as specifically described. In addition, any combination of two or more features, systems, articles, materials, and/or methods described herein, if such features, systems, articles, materials, and/or methods are not mutually inconsistent, is included within the scope of the present disclosure.


Also, as described, some aspects may be embodied as one or more methods. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.


The terms “approximately,” “substantially,” and “about” may be used to mean within ±20% of a target value in some embodiments, within ±10% of a target value in some embodiments, within ±5% of a target value in some embodiments, and yet within ±2% of a target value in some embodiments. The terms “approximately” and “about” may include the target value.

Claims
  • 1. A method of manufacture of a stress-isolated microelectromechanical systems (MEMS) device, comprising: providing a substrate having a first side and a second side opposite the first side;etching a trench in the first side of the substrate;forming a platform adjacent to and substantially surrounded by the trench; andsubsequent to etching the trench, forming a MEMS device on a surface of the platform opposite the first side of the substrate.
  • 2. The method of claim 1, wherein etching the trench comprises defining a plurality of tethers at locations configured to connect the platform to a periphery of the substrate.
  • 3. The method of claim 1, further comprising forming the MEMS device on the surface of the platform to include a movable sensing mass having a thickness of approximately 8 microns or greater.
  • 4. The method of claim 1, wherein forming the platform further comprises etching a cavity in the first side of the substrate prior to etching the trench, wherein the cavity laterally extends at least to the trench.
  • 5. The method of claim 4, further comprising: etching the cavity to a first depth; andetching the trench to a second depth greater than the first depth.
  • 6. The method of claim 4, wherein the substrate comprises a first substrate, and wherein the method further comprises, after etching the trench and after etching the cavity, bonding a second substrate to the first substrate, over the cavity and the trench, to form a sealed cavity.
  • 7. The method of claim 6, further comprising thinning the second substrate such that the stress-isolated MEMS device has a thickness of less than approximately 500 microns.
  • 8. A method of forming a stress-isolated microelectromechanical systems (MEMS) device, comprising: defining a suspended platform at least in part by backside etching a wafer, the backside etching defining a plurality of tethers positioned to connect the suspended platform to a peripheral region; andsubsequent to the backside etching, forming the MEMS device on a front side of the suspended platform.
  • 9. The method of claim 8, wherein backside etching the wafer comprises forming a trench in the wafer, and wherein the method further comprises forming a jumper spanning the trench and not aligned with any of the plurality of tethers.
  • 10. The method of claim 9, wherein forming the MEMS device comprises forming a movable sensing mass, and wherein forming the jumper comprises forming the jumper from a common layer with the movable sensing mass.
  • 11. The method of claim 8, wherein the wafer is a first wafer, and wherein the method comprises bonding the first wafer and a second wafer prior to backside etching the first wafer, removing the second wafer from the first wafer subsequent to backside etching the first wafer, and bonding the first wafer to a third wafer prior to forming the MEMS device on the front side of the suspended platform.
  • 12. The method of claim 8, wherein forming the stress-isolated MEMS device comprises defining a thickness of the MEMS device and of the wafer to be less than 500 microns total.
  • 13. The method of claim 8, wherein the wafer is a first wafer, and wherein the method further comprises bonding a cap wafer to the first wafer.
  • 14. The method of claim 8, wherein backside etching of the wafer comprising a first etch defining a cavity and a second etch defining a trench through a portion of the cavity.
RELATED APPLICATIONS

This Application claims the benefit under 35 USC 119(e) of U.S. Application Ser. No. 63/069,697, filed Aug. 24, 2020, and entitled “STRESS-ISOLATED MEMS DEVICE COMPRISING SUBSTRATE HAVING CAVITY AND METHOD OF MANUFACTURE”, which is incorporated by reference herein in its entirety. This Application claims the benefit under 35 USC 119(e) of U.S. Application Ser. No. 63/036,974, filed Jun. 9, 2020, and entitled “STRESS-ISOLATED MEMS DEVICE COMPRISING SUBSTRATE HAVING CAVITY”, which is incorporated by reference herein in its entirety.

US Referenced Citations (176)
Number Name Date Kind
3839660 Stryker Oct 1974 A
4492825 Brzezinski et al. Jan 1985 A
4524247 Lindenberger et al. Jun 1985 A
4533795 Baumhauer, Jr. et al. Aug 1985 A
4558184 Bch-Vishniac et al. Dec 1985 A
4710744 Wamstad Dec 1987 A
4740410 Muller et al. Apr 1988 A
4744863 Guckel et al. May 1988 A
4776019 Miyatake Oct 1988 A
4800758 Knecht et al. Jan 1989 A
4825335 Wilner Apr 1989 A
4853669 Guckel et al. Aug 1989 A
4872047 Fister et al. Oct 1989 A
4918032 Jain et al. Apr 1990 A
4948757 Jain et al. Aug 1990 A
4996082 Guckel et al. Feb 1991 A
5067007 Otsuka et al. Nov 1991 A
5090254 Guckel et al. Feb 1992 A
5105258 Silvis et al. Apr 1992 A
5113466 Acarlar et al. May 1992 A
5146435 Bernstein Sep 1992 A
5172213 Zimmerman Dec 1992 A
5178015 Loeppert et al. Jan 1993 A
5188983 Guckel et al. Feb 1993 A
5207102 Takahashi et al. May 1993 A
5241133 Mullen, III et al. Aug 1993 A
5273939 Becker et al. Dec 1993 A
5303210 Bernstein Apr 1994 A
5314572 Core et al. May 1994 A
5315155 O'Donnelly et al. May 1994 A
5317107 Osorio May 1994 A
5336928 Neugebauer et al. Aug 1994 A
5452268 Bernstein Sep 1995 A
5468999 Lin et al. Nov 1995 A
5490220 Loeppert Feb 1996 A
5515732 Willcox et al. May 1996 A
5593926 Fujihira Jan 1997 A
5596222 Bernstein Jan 1997 A
5608265 Kitano et al. Mar 1997 A
5629566 Doi et al. May 1997 A
5633552 Lee et al. May 1997 A
5658710 Neukermans Aug 1997 A
5684324 Bernstein Nov 1997 A
5692060 Wickstrom Nov 1997 A
5740261 Loeppert et al. Apr 1998 A
5828127 Yamagata et al. Oct 1998 A
5870482 Loeppert et al. Feb 1999 A
5901046 Ohta et al. May 1999 A
5923995 Kao et al. Jul 1999 A
5939633 Judy Aug 1999 A
5945605 Julian et al. Aug 1999 A
5956292 Bernstein Sep 1999 A
5960093 Miller Sep 1999 A
5994161 Bitko et al. Nov 1999 A
6084292 Shinohara Jul 2000 A
6128961 Haronian Oct 2000 A
6169328 Mitchell et al. Jan 2001 B1
6243474 Tai et al. Jun 2001 B1
6249075 Bishop et al. Jun 2001 B1
6309915 Distefano Oct 2001 B1
6329706 Nam Dec 2001 B1
6384472 Huang May 2002 B1
6384473 Peterson et al. May 2002 B1
6401545 Monk et al. Jun 2002 B1
6433401 Clark et al. Aug 2002 B1
6505511 Geen et al. Jan 2003 B1
6522762 Mullenborn et al. Feb 2003 B1
6535460 Loeppert et al. Mar 2003 B2
6548895 Benavides et al. Apr 2003 B1
6552469 Pederson et al. Apr 2003 B1
6617683 Lebonheur et al. Sep 2003 B2
6667189 Wang et al. Dec 2003 B1
6667557 Alcoe et al. Dec 2003 B2
6677176 Wong et al. Jan 2004 B2
6704427 Kearey Mar 2004 B2
6711317 Jin et al. Mar 2004 B2
6731180 Clark et al. May 2004 B1
6732588 Mullenborn et al. May 2004 B1
6741709 Kay et al. May 2004 B2
6753583 Stoffel et al. Jun 2004 B2
6768196 Harney et al. Jul 2004 B2
6781231 Minervini Aug 2004 B2
6812620 Scheeper et al. Nov 2004 B2
6816301 Schiller Nov 2004 B1
6821819 Benavides Nov 2004 B1
6829131 Loeb et al. Dec 2004 B1
6847090 Loeppert Jan 2005 B2
6857312 Choe et al. Feb 2005 B2
6859542 Johannsen et al. Feb 2005 B2
6892575 Nasiri et al. May 2005 B2
6914992 van Halteren et al. Jul 2005 B1
6955988 Nevin et al. Oct 2005 B2
6984886 Ahn et al. Jan 2006 B2
7066004 Kohler Jun 2006 B1
7088032 Oita et al. Aug 2006 B2
7166911 Karpman et al. Jan 2007 B2
7215213 Mescher et al. May 2007 B2
7223624 Wu et al. May 2007 B2
7268463 Li et al. Sep 2007 B2
7309865 Ikushima et al. Dec 2007 B2
7551048 Iwata et al. Jun 2009 B2
7839052 Wu et al. Nov 2010 B2
7871865 Sengupta et al. Jan 2011 B2
8049326 Najafi et al. Nov 2011 B2
8103027 Zhang et al. Jan 2012 B2
8217474 Lee et al. Jul 2012 B2
8344487 Zhang et al. Jan 2013 B2
8418554 Joyce Apr 2013 B2
8476737 Najafi et al. Jul 2013 B2
8643125 Chen et al. Feb 2014 B2
8671752 Hoefer et al. Mar 2014 B2
8698292 Najafi et al. Apr 2014 B2
8906730 Graham et al. Dec 2014 B2
9010190 Potasek et al. Apr 2015 B2
9184138 Merassi et al. Nov 2015 B2
9227835 Horning et al. Jan 2016 B2
9250262 Desai et al. Feb 2016 B1
9422156 Smeys Aug 2016 B2
9446940 Dawson et al. Sep 2016 B2
9650237 Ocak et al. May 2017 B2
9670057 Oldsen Jun 2017 B1
9676614 Johari-Galle et al. Jun 2017 B2
9716015 Bieselt Jul 2017 B2
9975756 Duqi May 2018 B2
9995762 Hayashi et al. Jun 2018 B2
10017375 Reichenbach et al. Jul 2018 B2
10060820 Chen et al. Aug 2018 B2
10071905 Chu et al. Sep 2018 B2
10131538 Kaanta et al. Nov 2018 B2
10167189 Zhang et al. Jan 2019 B2
10301171 Chakravarty et al. May 2019 B1
10759659 Zhang et al. Sep 2020 B2
20010055836 Kunda Dec 2001 A1
20020102004 Minervini Aug 2002 A1
20020125208 Christenson et al. Sep 2002 A1
20020125559 Mclellan Sep 2002 A1
20030016839 Loeppert et al. Jan 2003 A1
20030133588 Pedersen Jul 2003 A1
20030189222 Itou et al. Oct 2003 A1
20040041254 Long et al. Mar 2004 A1
20040056337 Hasebe et al. Mar 2004 A1
20040070056 Matsuzawa et al. Apr 2004 A1
20040179705 Wang et al. Sep 2004 A1
20040184632 Minervini Sep 2004 A1
20040184633 Kay et al. Sep 2004 A1
20040262781 Germain et al. Dec 2004 A1
20050005421 Wang et al. Jan 2005 A1
20050018864 Minervini Jan 2005 A1
20050089188 Feng Apr 2005 A1
20050093117 Masuda et al. May 2005 A1
20050178208 Benzel et al. Aug 2005 A1
20060246630 Sunohara et al. Nov 2006 A1
20070040231 Harney et al. Feb 2007 A1
20070042521 Yama Feb 2007 A1
20080290430 Mahadevan et al. Nov 2008 A1
20110127623 Fueldner et al. Jun 2011 A1
20110165717 Lee et al. Jul 2011 A1
20120049298 Schlarmann et al. Mar 2012 A1
20120068278 Knipe et al. Mar 2012 A1
20120248552 Benzel Oct 2012 A1
20120264250 Graham et al. Oct 2012 A1
20140217521 Johari-Galle et al. Aug 2014 A1
20140339656 Schlarmann Nov 2014 A1
20140353772 Stermer Dec 2014 A1
20150197419 Cheng et al. Jul 2015 A1
20160090297 Zhang et al. Mar 2016 A1
20160159641 Najafi et al. Jun 2016 A1
20160229688 Gu et al. Aug 2016 A1
20170030788 Boysel et al. Feb 2017 A1
20170073218 Kaanta et al. Mar 2017 A1
20170122976 Mitchell et al. May 2017 A1
20180230005 Lee et al. Aug 2018 A1
20180299335 Wong et al. Oct 2018 A1
20190031499 Pregl et al. Jan 2019 A1
20190047846 Zhang et al. Feb 2019 A1
20190161346 Lee et al. May 2019 A1
Foreign Referenced Citations (17)
Number Date Country
10 2010 042438 Jul 2011 DE
10 2010 042113 Apr 2012 DE
0 788 157 Jun 1997 EP
60-077434 May 1985 JP
62-241355 Oct 1987 JP
05-226501 Sep 1993 JP
07-142518 Jun 1995 JP
08-116007 Apr 1996 JP
WO 8301362 Apr 1983 WO
WO 9105368 Apr 1991 WO
WO 0120948 Mar 2001 WO
WO 0245463 Jun 2002 WO
WO 2004022477 Mar 2004 WO
WO 2005036698 Apr 2005 WO
WO 2007030345 Mar 2007 WO
WO 2012037537 Mar 2012 WO
WO 2016112463 Jul 2016 WO
Non-Patent Literature Citations (50)
Entry
[No Author Listed], Department of Defense. Test Method Standard Microcircuits, FSC 5962, completed 1997.
[No Author Listed], Electret Condenser Microphone Cartridge Preamplifier, Maxim Integrated Products, Jul. 2002, 9 pages.
[No Author Listed], Liquid Crystal Polymer (LCP) Air Cavity Packages, Quantum Leap Packaging, Inc., Brochure, 2004, 2 pages.
[No Author Listed], Microphone industry to expand MEMS-based offerings, The Information Network, online <www.theinformationnet.com>, printed Feb. 1, 2005, Nov. 14, 2003, 2 pages.
[No Author Listed], Phone-Or/Technology, online <file://C:\Documents%20and%20Settings\bmansfield\Local%20Settings\Temporary%20-Internet%20Files\OLKE\Phone-Or%20% . . . >, printed Feb. 1, 2005, 2 pages.
[No Author Listed], The Prismark Wireless Technology Report—Mar. 2005. Prismark Partners LLC; www.prismark.com, pp. 1-44.
Bajdechi et al., Single-Chip Low-Voltage Analog-to-Digital Interface for Encapsulation with Electret Microphone, The 11th International Conference on Solid-State Sensors and Actuators, Jun. 10-14, 2001, 4 pages.
Bernstein et al., High Sensitivity MEMS Ultrasound Arrays by Lateral Ferroelectric Polarization, Solid-State Sensor and Actuator Workshop, Jun. 4-8, 2000, 4 pages.
Bernstein, MEMS Air Acoustics Research The Charles Stark Draper Laboratory, PowerPoint Presentation, Aug. 1999, 8 pages.
Blackwell, The Electronic Packaging Handbook, CRC Press LLC, pp. 2-3, 7-1, 7-12, A-9, and A-11, 2000.
Brown, Advanced Electronic Packaging with Emphasis on Multichip Modules, Institute of Electrical and Electronics Engineers, Inc., pp. 4-8, 568, 1999.
Chen et al., Single-Chip Condenser Miniature Microphone with a High Sensitive Circular Corrugated Diaphragm, IEEE, 2002, 4 pages.
Cunningham et al., Wide bandwidth silicon nitride membrane microphones, SPIE vol. 3223, Sep. 1997, 9 pages.
Fan et al., Development of Artificial Lateral-Line Flow Sensors, Solid-State Sensor, Actuator and Microsystems Workshop, Jun. 2-6, 2002, 4 pages.
Fuldner et al., Silicon Microphones with Low Stress Membranes, The 11th International Conference on Solid-State Sensors and Actuators, Jun. 10-14, 2001, 4 pages.
Gale et al., MEMS Packaging, University of Utah, Microsystems Principles, PowerPoint Presentation, Oct. 11, 2001, 8 pages.
Hall et al., Self-Calibrating Micromachined Microphones with Integrated Optical Displacement Detection, The 11th International Conference on Solid State Sensors and Actuators, Jun. 10-14, 2001, 4 pages.
Harper (Editor-in-Chief), Electronic Packaging and Interconnection Handbook, Third Edition, McGraw-Hill, Chapter 7, Section 7.2.3.1, 2000, 7 pages.
Heuberger, Mikromechanik, Springer Verlang A.G., pp. 470-476, 1989 (With translation).
Hsieh et al., A Micromachined Thin-film Teflon Electret Microphone, Department of Electrical Engineering California Institute of Technology, 1997, 4 pages.
Judy, “Microelectromechanical systems (MEMS): fabrication, design and applications”, Electrical Engineering Department, Institute of Physics Publishing, Smart Materials and Structures, vol. 10, pp. 1115-1134 Nov. 26, 2001.
Kabir et al., High Sensitivity Acoustic Transducers with Thin P+ Membranes and Gold Back-Plate, Sensors and Actuators, vol. 78, Issue 2-3, Dec. 17, 1999, 17 pages.
Ko et al., Piezoelectric Membrane Acoustic Devices, IEEE, 2002, 4 pages.
Kopola et al., MEMS Sensor Packaging Using LTCC Substrate Technology, VTT Electronics, Proceedings of SPIE vol. 4592, 2001, pp. 148-158.
Lee et al., Cavity-Enhanced Sacrificial Layer Micromachining for Faster Release of Thin Film Encapsulated MEMS. Iopscience. May 15, 2015; 25(6):1-8.
Luoto et al., MEMS on Cavity-SOI Wafers. Science Direct. Feb. 2007; 51(2):328-332.
Ma et al., Design and Fabrication of an Integrated Programmable Floating-Gate Microphone, IEEE, 2002, 4 pages.
Mason, Companies Compete To Be Heard On the Increasingly Noisy MEMS Phone Market, Small Times: News about MEMS, Nanotechnology and Microsystems, Jul. 18, 2003, 4 pages.
Mori, Silicon-on-Insulator (SOI) Technology for Micro-Electromechanical Systems (MEMS) and Nano-Electromechanical Systems (NEMS) Sensors. Institute of Microelectronics. Singapore. Jun. 27, 2014; 19 pages.
Neumann et al., A Fully-Integrated CMOS-MEMS Audio Microphone, The 12th International Conference on Solid State Sensors, Actuators and Microsystems Jun. 8-12, 2003, 4 pages.
Ono et al., Design and Experiments of Bio-mimicry Sound Source Localization Sensor with Gimbal-Supported Circular Diaphragm, The 12th International Conference on Solid State Sensors, Actuators and Microsystems, Jun. 8-12, 2003, 4 pages.
Pecht, Handbook of Electronic Package Design, Marcel Dekker, Inc. pp. 173, 179, 196, 210, 736, 744, 821 and 832, 1991.
Pedersen et al., A Polymer Condenser Microphone on Silicon with On-Chip CMOS Amplifier, Solid State Sensors and Actuators, 1997, 3 pages.
Rugg et al., Thermal Package Enhancement Improves Hard Disk Drive Data Transfer Performance, Pan Pacific Microelectronics Symposium, Proceedings of the Technical Program, Island of Maui, Hawaii, Feb. 5-7, 2002, pp. 451-456.
Schafer et al., Micromachined Condenser Microphone for Hearing Aid Use, Solid-State Sensor and Actuator Workshop, Jun. 8-11, 1998, 4 pages.
Sheplak et al., A Wafer-Bonded, Silicon-Nitride Membrane Microphone with Dielectrically-Isolated, Single-Crystal Silicon Piezoresistors, Solid-State Sensor and Actuator Workshop, Jun. 8-11, 1998, 4 pages.
Stahl et al., Thin Film Encapsulation of Acceleration Sensors Using Polysilicon Sacrificial Layer, Transducers '03, The 12th International Conference on Solid State Sensors, Actuators and Microsystems, Jun. 8-12, 2003, 4 pages.
Tilmans et al., The indent reflow sealing (IRS) technique—a method for the fabrication of sealed cavities for MEMS devices. IEEE Journal of Microelectro-mechanical Systems. 2000; 9(2):206-217.
Torunbalci et al., A Method for Wafer Level Hermetic Packaging of SOI-MEMS Devices with Embedded Vertical Feedthroughs Using Advanced MEMS Process. Journal of Micromechanics and Microengineerng. Nov. 18, 2015; 25: 11 pages.
Tummula et al., Microelectronics Packaging Handbook, Semiconductor Packaging Part II, Second Edition, Chapman & Hall, pp. 11-12, 1997.
Weigold et al., A MEMS Condenser Microphone for Consumer Applications, Analog Devices, Inc. and Pixtronix, Inc., Jan. 2006, 4 pages.
Yovcheva et al., Investigation on Surface Potential Decay in PP Corona Electrets, BPU-5: Fifth General Conference of the Balkan Physical Union, Aug. 25-29, 2003, 4 pages.
Zhuang et al., Integration of Trench-Isolated Through-Wafer Interconnects with 2d Capacitive Micromachined Ultrasonic Transducer Arrays. ScienceDirect. Sensors and Actuators A. Apr. 19, 2007; 138: 221-229.
Zou et al., A Novel Integrated Silicon Capacitive Microphone—Floating Electrode “Electret” Microphone (FEEM), Journal of Microelectromechanical Systems, vol. 7, No. 2, Jun. 1998, 11 pages.
Final Office Action, U.S. Appl. No. 13/757,217, 10 pages, dated Feb. 27, 2015.
Non Final Office Action, U.S. Appl. No. 13/757,217, 20 pages, dated Jul. 2, 2014 [2550/E20].
Response to Office Action of Jul. 2, 2014—U.S. Appl. No. 13/757,217, filed Dec. 20, 2014, 29 pages.
Request for Continued Examination (RCE)—U.S. Appl. No. 13/757,217, filed Aug. 27, 2015, 13 pages.
Response to Notice of Non-Compliant Amendment of Mar. 11, 2016—U.S. Appl. No. 13/757,217, filed Jun. 17, 2016, 8 pages.
Office Action—U.S. Appl. No. 13/757,217, dated Jun. 27, 2016, 30 pages.
Related Publications (1)
Number Date Country
20210380403 A1 Dec 2021 US
Provisional Applications (2)
Number Date Country
63069697 Aug 2020 US
63036974 Jun 2020 US