Patent Application
20070221613
This invention relates generally to the manufacture of semiconductor devices, especially a substrate wafer with at least one crack stop structure to be used in the manufacturing of semiconductor devices. The invention also relates to the use of a crack stop structure and a method for manufacturing a crack stop structure.
In the manufacturing of semiconductor devices, a substrate wafer forms the basis from which individual devices, such as DRAM chips or microprocessors, are manufactured. It is known that a substrate wafer made from, e.g., silicon, germanium, InP or GaAs wafers, is used for such purposes.
To improve the yield of the processes, substrate wafers become larger, making the mechanical handling more difficult. With increasing diameters, substrate wafers are more prone to mechanical stress within the substrate wafer, which occurs during the substrate wafer handling. Since the substrate wafers are subjected to an increasing number of process steps, this problem becomes pronounced.
Especially problematic is the process step in which the devices, such as chips, are cut from the substrate wafer. Pieces of the substrate wafer can break off from the edges or corners of the dies. That is, pieces tend to break off the edge of the chips or dies directly next to the kerf. The kerf is the slot left in the substrate wafer by the saw used to dice the substrate wafer into chips or dies.
So far, crack stop lines have been used to reduce the occurrence of chipping along the edges and the corners of dies. Those crack stop lines may consist of stacked metal lines that are connected (stitched) by via holes filled with conducting material (e.g., tungsten). The crack stop lines minimize the delamination of films that have been deposited on the surface of the die. However, they cannot prevent cleave lines in the substrate wafer, originating at the edge of the die, from running into the active substrate wafer region of the chip, thus causing the chip to malfunction.
That is, all of the crack stop designs that are currently used, utilize structures within the thin films that are added to the surface of a substrate wafers during the fabrication of the chips or dies.
Embodiments of invention are concerned with forming crack stop structures that penetrate into the substrate wafer itself. These structures are much more effective in trapping cracks that could form in the kerf and penetrate into the chip region. Furthermore, embodiments of the invention utilize etching processes for these structures that are already necessarily used to fabricate the chips or dies.
Two examples of processes that could be used to form these new crack stops are deep trench etches used to form capacitor structures in, for example DRAM circuits, and through silicon contact etches used to transfer contact regions from the top of the substrate wafer surface on which devices are made, to the back of the chip. Such through contacts then enable die stacking technologies.
The preferred embodiment structure for stopping mechanical cracks comprises at least a depression extending into the substrate wafer for at least 20%, especially 5% of the final thickness of the substrate wafer. This is especially applicable to silicon wafers as substrates.
By positioning the depressions relatively deep into the substrate wafer, especially relative to the other parts of the electronic devices on the substrate wafer, it is assured that cracks are intercepted by the depressions so that they cannot propagate over a larger area, thereby harming the functionality of the devices.
Other advantages of the invention become apparent upon reading of the detailed description of the invention and the appended claims provided below, and upon reference to the drawings.
The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
To prevent the propagation of mechanical cracks in the substrate wafer 10, crack stop structures 1 are positioned around the rectangular devices 2, i.e., chips in this particular case on the substrate wafer 10. In the context of this description, a device is a piece cut from the substrate wafer 10 in the process of manufacturing a semiconductor device. The device can be, e.g., a processor chip or a memory chip such as a DRAM chip.
A single device 2 is depicted in the enlargement to the right in
The crack stop structure 1 can take the shape of a trench that has been etched as a depression into the substrate wafer 10. An example is shown in the cross section view of
If the substrate wafer 10 is used for DRAM manufacturing comprising deep-trench structures, the general rule for the depth d of the depression 1 would be at least as deep as the deep trenches in such a device. A typical deep trench has a depth of 6 μm. A possible range for the depth of deep trenches is 5 to 15 μm. The general rule for determining the depth d of the depression 1 (i.e., the deep trench) is that it should be at least 20% of the thickness of the substrate wafer 10 after backside grinding (see
Normally, backside grinding of a substrate wafer 10 is a common part of the semiconductor device manufacturing process. Backside grinding of a wafer 10 is depicted schematically in
The width w of the depression 1 in
The embodiment depicted in
The etching of the depression 1 can be performed by any known dry etching or wet etching process. Preferably an existing anisotropic dry etching process is used. One example is the deep trench etching process in trench DRAM manufacturing. This is especially economical if a deep etch process step (e.g., deep trenches, holes) is already performed on the substrate wafer 10 in the normal process flow.
Furthermore, deep etching steps are regularly necessary in the manufacturing of microelectromechanical systems (MEMS) or in the manufacturing of chips with complex 3D vias such as the through etches described in the article “Ultra-Low Resistance, Through-Wafer Via (TWV) Technology and Its Applications in Three dimensional Structures on Silicon” by Soh, et al. (Jpn. J. Appl. Phys. Vol 38, 1999, pp. 2393-2396), which article is incorporated herein by reference.
The depression 1 forms the crack stop structure deflecting cleave lines running through the bulk of the substrate wafer 10 and shunts them to the surface of the substrate wafer 10. Therefore, the depression prevents cleave lines from extending into the sensitive region of the substrate wafer 10, i.e., the active area 2 within the depression 1.
The embodiment depicted in
The embodiment shows a chip or device 10 with a rectangular shape. The depression 1, being a trench, is also shaped rectangular running parallel to the edges of the substrate wafer 10.
It should be noted that the scope of the patent includes more complex forms of continuous depressions 1, which can be combinations of curved depressions and linear depressions 1 (as in
The second embodiment of the invention is depicted in
A person skilled in the art will also realize that a crack stop structure 1 on the chip or device 10 can be formed from combinations of continuous trenches and holes or depressions. Just one example of such a crack stop structure 1 is the embodiment depicted in
In
In
Even though the embodiments of the invention are described in connection with a silicon substrate wafer 10, the person skilled in the art will notice that the same or similar crack stop structures 1 could be applied to other semiconductor substrate wafer materials such as GaAs or germanium. GaAs wafers have thickness between 400 and 500 mm so that the dimensions of the depression 1 would have to be adjusted accordingly.
A typical application of a crack stop structure 1 as described would be in a substrate wafer 10 used in the production of microelectromechanical systems (MEMS) or in devices comprising complex three dimensional structures.
The crack stop structure 1 can be produced, e.g., by an etching process such as etching a deep contact, a wet etch process, a dry etch process or a through etch.
While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.
