Patent Application
20070298620
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.
As shown in
Preferably, the solvent dissolvable polymer layer 120 has good adhesion to metallic material (for example, the bonding pad 108) and dielectric material (for example, the dielectric layer 110). In the present embodiment, the solvent dissolvable polymer layer 120 can be fabricated using hexamethyidisilazane (HMDS), bis(dimethylamino)dimethylailane (BDMAS), dimethylsilyidiethylamine (DMSEDA) or other suitable polymers. For example, the solvent dissolvable polymer layer 120 is formed at a temperature from 90° C. and 120° C. with a processing time from 30 sec to 90 sec. In addition, a dehydration operation can be performed before forming the solvent dissolvable polymer layer 120 over the surface of the chip 10.
After forming the solvent dissolvable polymer layer over the surface of a chip with all back-end-on-line (BEOL) processes completed, a storage structure for the microelectronic device according to the present invention is obtained. Due to the presence of the solvent dissolvable polymer layer, the microelectronic device is shielded from environmental contaminants.
The water-resistant layer in the second embodiment will neither affect the testing accuracy in the sorting process nor contaminate the probe pin which performing the test, therefore it is compatible to the testing operation in wafer sorting.
Thereafter, the water-resistant layer is removed in step 320. The method of removing the water-resistant layer includes performing a strong alkaline solvent cleaning as in the front-end-of line (FEOL) process, a wet stripper cleaning as in the back-end-of-line (BEOL) process or a plasma etching. In addition, the surface of the chip can also be simultaneously cleaned in the step 320. For example, the cleaning operation may include applying a cleaning agent such as isopropyl alcohol (IPA) or DI water ultrasonic cleaning with hydrogen peroxide, ammonia water or diluted hydrofluoric acid (DHF) solution (for example, the concentration of diluted hydrofluoric acid ≦100:1). An additional back grinding of the chip may also be carried out depending on the actual requirement. Finally, in step 330, the step of bonding of the chip and the circuit substrate together is performed.
In summary, one special aspect of the present invention is the formation of a solvent dissolvable polymer layer over the chip after completing all back-end-on-line processes. Thus, the surface of the chip is shielded from the damaging effects caused by the environment so that problem such as corrosion, discoloration or delamination on the surface of the chip is largely avoided. Moreover, the solvent dissolvable polymer layer is easy to produce and compatible with most BEOL processes as well as clean room facility and processing stations. The present invention can be applied to the sorting of microelectronic devices without affecting their testing accuracy and probe pin cleanliness. Furthermore, the present invention can also be applied to assemble microelectronic devices without affecting their bonding operation and quality.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
