This application claims benefit of priority to Japanese Patent Application No. 2023-151537, filed Sep. 19, 2023, the entire content of which is incorporated herein by reference.
The present disclosure relates to a switching power supply device.
There is an increasing demand for a switching power supply device that converts the direct current (hereinafter, also referred to as “DC”) power of an in-vehicle battery into a voltage and supplies power to a load of an in-vehicle device. In recent years, with the increase in switching frequency and the increase in speed of signals handled by in-vehicle devices, a common-mode noise problem in a high-frequency band (for example, 30 MHz to 1000 MHz) has become apparent. For example, a technology related to a printed multilayer circuit board capable of reducing electromagnetic interference (EMI) radiation from a power line has been disclosed (for example, International Publication No. 2017/006552).
Common-mode choke coils have been generally used as common-mode noise measures in a low-frequency band (for example, 0.15 MHz to 30 MHz). In such a configuration, high-frequency noise may leak out through the stray capacitance of the common-mode choke coil.
The present disclosure has been made in view of the above, and realizes a switching power supply device with enhanced noise reduction effect.
One aspect of the present disclosure relates to a switching power supply device that converts a voltage input from a DC power supply into power and supplies the power to a load, the switching power supply device including: a power conversion circuit including an input capacitor, an output capacitor, a switching element, and an inductor, and a common-mode choke coil that is provided between the DC power supply and the power conversion circuit and includes a core material around which a first winding and a second winding are linearly wound and aligned by being turned in one direction, in which the power conversion circuit and the common-mode choke coil constitute a noise equalization circuit that is an electric closed circuit including a low-frequency band blocking filter and a high-frequency band blocking filter, the low-frequency band blocking filter including the input capacitor and a mutual inductance of the common-mode choke coil, the high-frequency band blocking filter including the mutual inductance and a stray capacitance of the common-mode choke coil, and the noise equalization circuit cancels out noise generated due to a switching operation of the switching element in each of a low-frequency band and a high-frequency band different from the low-frequency band.
In this configuration, the low-frequency noise generated due to the switching operation of the switching element is confined by the low-frequency band blocking filter, and the low-frequency noise that is conducted to the DC power supply is reduced. In addition, the high-frequency noise generated due to the switching operation of the switching element is confined by the high-frequency band blocking filter, and the high-frequency noise that is conducted to the DC power supply is reduced. Since the phase of the continuously generated noise is not constant, the noise is confined in the electric closed circuit to cancel each other out. As a result, it is possible to effectively reduce the radiation of switching noise to the DC power supply and to the outside, and to effectively reduce the generation of common-mode noise due to noise propagation to the DC power supply.
According to the present disclosure, it is possible to provide a switching power supply device with an enhanced noise reduction effect. In particular, it is possible to achieve high efficiency of a power conversion circuit by reducing noise by canceling out the noise generated at a noise source, instead of converting the noise generated due to the switching operation of the switching element into thermal energy and causing power loss. In addition, it is possible to realize the common-mode choke coil that can also effectively reduce noise in a high-frequency band (100 MHz to 1000 MHz) at the same time as the frequency band (0.15 MHz to 30 MHz) in which the common-mode choke coil effectively acts to reduce noise.
Hereinafter, a switching power supply device according to an embodiment will be described in detail based on drawings. The present disclosure is not limited by this embodiment. Each embodiment is an example, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. In Embodiment 2 and subsequent embodiments, descriptions of matters common to Embodiment 1 will be omitted, and only differences will be described. In particular, similar actions and effects achieved by the similar configuration will not be repeated in each embodiment.
The switching power supply device 100 includes a power conversion circuit 3 and a common-mode choke coil 1 provided between the DC power supply and the power conversion circuit 3, as main components. The switching power supply device 100 according to the present disclosure is, for example, mounted on a vehicle, and an aspect in which DC is supplied from an in-vehicle battery through a power line such as a harness is exemplified. Alternatively, for example, the aspect may be an aspect in which the switching power supply device 100 is mounted on an electric vehicle (EV) or a plug-in hybrid electric vehicle (PHEV) and is supplied with direct current from an onboard battery charger (OBC) that converts commercial alternating current (hereinafter, also referred to as “AC”) power into DC power to charge an in-vehicle battery.
The common-mode choke coil 1 includes a first winding 51 and a second winding 52.
One end of the first winding 51 is connected to the low potential side of a DC power supply through a wiring pattern P−. The potential on the low potential side of the DC power supply is defined as a first reference potential GND1. Hereinafter, the wiring pattern P− is also referred to as a “first reference potential wiring pattern P−”.
The other end of the first winding 51 is connected to the low potential side of the load 2 through a wiring pattern L−. The potential on the low potential side of the load 2 is defined as a second reference potential GND2. Hereinafter, the wiring pattern L− is also referred to as a “second reference potential wiring pattern L−”.
One end of the second winding 52 is connected to the high potential side of the DC power supply through a wiring pattern P+. The potential on the high potential side of the DC power supply is defined as an input positive potential VIN. Hereinafter, the wiring pattern P+ is also referred to as a “DC positive potential wiring pattern P+”.
The other end of the second winding 52 is connected to the input side of the power conversion circuit 3 via a wiring pattern L+. The input-side potential of the power conversion circuit 3 is substantially equivalent to the input positive potential VIN, which is a potential on the high potential side of the DC power supply. Hereinafter, the wiring pattern L+ will also be referred to as an “input positive potential wiring pattern L+”.
An input capacitor CIN is connected between the input side of the power conversion circuit 3 and the second reference potential GND2. A direct-current voltage supplied from a DC power supply is applied between both ends of the input capacitor CIN.
An output capacitor COUT is connected between the output side of the power conversion circuit 3 and the second reference potential GND2. An output voltage of the power conversion circuit 3 is applied between both ends of the output capacitor COUT.
The high potential side of the load 2 is connected to the output side of the power conversion circuit 3 through a wiring pattern COUT+.
In the example shown in
The switching element Q1 and the switching element Q2 are connected in series. More specifically, the source of the switching element Q1 and the drain of the switching element Q2 are connected.
The input capacitor CIN is connected between the drain of the switching element Q1 and the source of the switching element Q2. One end of the inductor L is connected to a connection point between the switching element Q1 and the switching element Q2, and the output capacitor COUT is connected between the other end of the inductor L and the source of the switching element Q2.
A control circuit 311 is connected to the gates of the switching elements Q1 and Q2. The switching elements Q1 and Q2 are switching-controlled by control signals output from the control circuit 311.
The DC-DC converter is not limited to the above-described configuration, and a known configuration may be adopted.
In the above configuration, the common-mode choke coil 1, the input capacitor CIN, the output capacitor COUT, and the inductor L are configured of, for example, surface mount devices (SMDs). In addition, the switching circuit 3B is configured, for example, by using a switching regulator IC.
The multilayer circuit board 4 has two or more wiring layers. In
A common-mode choke coil is generally used as a common-mode noise measure in a low-frequency band (for example, 0.15 MHz to 30 MHZ). The self-resonant frequency of the common-mode choke coil 1 is preferably 30 MHz or more.
The broken line arrow-indicated path shown in
For example, as shown in
In addition, a stray capacitance CC is also generated between the input and output of the first winding 51 and the second winding 52 of the common-mode choke coil 1.
The broken line arrow-indicated path shown in
In the common-mode choke coil of the related art, which is commonly used as a common-mode noise measure in a low-frequency band (for example, 0.15 MHz to 30 MHz), the stray capacitance CC between the input and output of the first winding 51 and the second winding 52 is large. In the high-frequency band, the impedance of the stray capacitance CC may be smaller than the impedance of the first winding 51 and the second winding 52, and thus a leakage path of the high-frequency common-mode noise passing through the stray capacitance CC may be formed by bypassing the first winding 51 and the second winding 52.
Specifically, for example, in a configuration in which, for example, the switching power supply device 100 is mounted on a vehicle, the common-mode noise that has leaked out through the stray capacitance CC or the stray capacitance CS between the input and output of the first winding 51 and the second winding 52 reaches an in-vehicle battery through a power line such as a harness. The common-mode noise that has reached the in-vehicle battery is fed back to the DC-DC converter 3A by the capacitive coupling (stray capacitance CX) between the reference potential (first reference potential GND1) of the vehicle (chassis) and the output point (connection point with the inductor L, see
Hereinafter, a specific example of the common-mode choke coil 1 in which the stray capacitance CC between the input and output of the first winding 51 and the second winding 52 can be decreased will be described.
As shown in
The drum core 10C includes a core portion 11, a first flange portion 20, and a second flange portion 30.
The core portion 11 is quadrangular prismatic. A section of the core portion 11 orthogonal to a central axis C is rectangular. The term “rectangular shape” used herein may be a shape having four sides and having a rectangular shape as a whole, and also includes a shape in which the corners of the rectangle are chamfered. The material of the core portion 11 is a non-conductive material. Specifically, the material of the core portion 11 is, for example, alumina, Ni—Zn-based ferrite, resin, or a mixture thereof.
Here, a specific axis parallel to the central axis C of the core portion 11 is defined as a first axis X. In addition, a specific axis orthogonal to the first axis X is defined as a second axis Y. In the present embodiment, the second axis Y is parallel to two of the four sides of the core portion 11 when viewed in a direction along the first axis X. In addition, an axis orthogonal to both the first axis X and the second axis Y is defined as a third axis Z. In the present embodiment, the third axis Z is parallel to the remaining two of the four sides of the core portion 11 when viewed in a direction along the first axis X. One of the directions along the first axis X is defined as a first positive direction X1, and the direction opposite to the first positive direction X1 is defined as a first negative direction X2. Similarly, one of the directions along the second axis Y is defined as a second positive direction Y1, and the direction opposite to the second positive direction Y1 is defined as a second negative direction Y2. In addition, one of the directions along the third axis Z is defined as a third positive direction Z1, and the direction opposite to the third positive direction Z1 is defined as a third negative direction Z2.
As shown in
Here, in the first flange portion 20, the surface facing the first positive direction X1 side is defined as a first outer end surface 22, and the surface facing the first negative direction X2 side is defined as a first inner end surface 23. In addition, a surface of the first flange portion 20 facing the second positive direction Y1 side is defined as a first side surface 24, and a surface of the first flange portion 20 facing the second negative direction Y2 side is defined as a second side surface 25. In addition, a surface of the first flange portion 20 facing the third positive direction Z1 side is defined as a first bottom surface 26, and a surface of the first flange portion 20 facing the third negative direction Z2 side is defined as a first top surface 27.
The first outer end surface 22 and the first inner end surface 23 are surfaces orthogonal to the central axis C. The first bottom surface 26 and the first top surface 27 are surfaces parallel to the central axis C. In addition, the first bottom surface 26 and the first top surface 27 are surfaces parallel to the mounting surface facing the multilayer circuit board when the common-mode choke coil 1 is mounted on the multilayer circuit board.
The first side surface 24 and the second side surface 25 are surfaces that are parallel to the central axis C and orthogonal to the first bottom surface 26.
The first flange portion 20 has a recessed portion 21. The recessed portion 21 is recessed with respect to the first bottom surface 26 of the first flange portion 20. The recessed portion 21 is open on both sides of the first flange portion 20 in a direction along the first axis X. As a result, the first bottom surface 26 of the first flange portion 20 is divided into two points with the recessed portion 21 interposed therebetween. The first flange portion 20 has a symmetrical shape in a direction along the second axis Y.
The second flange portion 30 is connected to a second end which is an end on the first negative direction X2 side of the core portion 11. The second flange portion 30 has a shape symmetrical to the first flange portion 20 in a direction along the first axis X. That is, the second flange portion 30 has a substantially quadrangular plate shape.
Here, in the second flange portion 30, a surface facing the first negative direction X2 side is defined as a second outer end surface 32, and a surface facing the first positive direction X1 side is defined as a second inner end surface 33. In addition, a surface of the second flange portion 30 facing the second positive direction Y1 side is defined as a third side surface 34, and a surface of the second flange portion 30 facing the second negative direction Y2 side is defined as a fourth side surface 35. In addition, a surface of the second flange portion 30 facing the third positive direction Z1 side is defined as a second bottom surface 36, and a surface of the second flange portion 30 facing the third negative direction Z2 side is defined as a second top surface 37.
The second outer end surface 32 and the second inner end surface 33 are planes orthogonal to the central axis C. The second bottom surface 36 and the second top surface 37 are surfaces parallel to the central axis C. In addition, the second bottom surface 36 and the second top surface 37 are surfaces that are parallel to the mounting surface facing the multilayer circuit board when the common-mode choke coil 1 is mounted on the multilayer circuit board. The third side surface 34 and the fourth side surface 35 are surfaces that are parallel to the central axis C and orthogonal to the second bottom surface 36.
The second flange portion 30 projects to the outer side portion with respect to the core portion 11 in the direction along the second axis Y and the direction along the third axis Z. In addition, the second flange portion 30 has a recessed portion 31. The recessed portion 31 is recessed with respect to the second bottom surface 36 of the second flange portion 30.
The materials of the first flange portion 20 and the second flange portion 30 are the same as the non-conductive material of the core portion 11. In addition, the first flange portion 20 and the second flange portion 30 are integrally molded with the core portion 11.
In the present embodiment, the maximum dimension of the drum core 10C in the direction along the first axis X is 3.2 mm. In addition, the maximum dimension of the drum core 10C in the direction along the second axis Y is 2.5 mm. In addition, the maximum dimension of the drum core 10C in the direction along the third axis Z is 2.3 mm.
The top plate 12 is in the shape of a rectangular plate. The top plate 12 is flat in the direction along the third axis Z. The long side of the top plate 12 is parallel to the first axis X. The short side of the top plate 12 is parallel to the second axis Y. The top plate 12 is located on the third negative direction Z2 side with respect to the drum core 10C. The top plate 12 is connected to both the first top surface 27 in the first flange portion 20 and the second top surface 37 in the second flange portion 30. That is, the top plate 12 is bridged between the first flange portion 20 and the second flange portion 30. The material of the top plate 12 is the same as the non-conductive material of the core portion 11. In
The common-mode choke coil 1 includes a first electrode 41, a second electrode 42, a third electrode 43, and a fourth electrode 44. The first electrode 41 is located on the outer surface of the first flange portion 20. Specifically, the first electrode 41 is located on the first bottom surface 26. In addition, the first electrode 41 is located on the first bottom surface 26 on the second positive direction Y1 side with respect to the central axis C. Specifically, the first electrode 41 is located on the second positive direction Y1 side with respect to the recessed portion 21.
The second electrode 42 is located on the outer surface of the first flange portion 20. Specifically, the second electrode 42 is located on the first bottom surface 26. In addition, the second electrode 42 is located on the first bottom surface 26 on the second negative direction Y2 side with respect to the central axis C. Specifically, the second electrode 42 is located on the second negative direction Y2 side with respect to the recessed portion 21.
The third electrode 43 is located on the outer surface of the second flange portion 30. Specifically, the third electrode 43 is located on the second bottom surface 36. In addition, the third electrode 43 is located on the second bottom surface 36 on the second positive direction Y1 side with respect to the central axis C. Specifically, the third electrode 43 is located on the second positive direction Y1 side with respect to the recessed portion 31.
The fourth electrode 44 is located on the outer surface of the second flange portion 30. Specifically, the fourth electrode 44 is located on the second bottom surface 36. In addition, the fourth electrode 44 is located on the second bottom surface 36 on the second negative direction Y2 side with respect to the central axis C. Specifically, the fourth electrode 44 is located on the second negative direction Y2 side with respect to the recessed portion 31.
The first electrode 41 to the fourth electrode 44 have a metal layer and a plating layer. The material of the metal layer is silver. The metal layer is formed on the outer surface of the first flange portion 20 or the second flange portion 30. The plating layer consists of three layers. The plating layer is laminated on the surface of the metal layer in the order of copper, nickel, and tin. In
As shown in
As shown in
Here, when the first winding 51 is traced from the first line end 51A to the second line end 51B, a first point of contact with the outer peripheral surface of the core portion 11 is defined as a 1.0-turn point A1 of the first winding 51. In the present embodiment, the 1.0-turn point A1 of the first winding 51 is located on the ridge line on the second negative direction Y2 side and the third positive direction Z1 side of the core portion 11. That is, the 1.0-turn point A1 of the first winding 51 is located on the second negative direction Y2 side with respect to the central axis C.
In addition, the number of turns is increased by one each time the first winding 51 makes one turn about the central axis C from the first line end 51A to the second line end 51B. The first winding 51 is wound around the core portion 11 to proceed in a clockwise direction as the number of turns increases when viewed in the first negative direction X2. Therefore, for example, when viewed in the first negative direction X2, a point at which the first winding 51 that has proceeded by 36 degrees from the 1.0-turn point A1 of the first winding 51 with the central axis C as the center is a 1.1-turn point of the first winding 51.
A first line end 52A of the second winding 52 is connected to the second electrode 42. A second line end 52B of the second winding 52 is connected to the fourth electrode 44. The first line end 52A and the second line end 52B are connected to the respective corresponding electrodes by thermal pressure bonding.
Here, when the second winding 52 is traced from the first line end 52A to the second line end 52B, a point at which the angle position about the central axis C first matches the angle position of the 1.0-turn point A1 of the first winding 51 is defined as a 1.0-turn point B1 of the second winding 52. That is, in the present embodiment, the 1.0-turn point B1 of the second winding 52 is located on a straight line connecting the ridge line of the core portion 11 on the second negative direction Y2 side and the third positive direction Z1 side and the central axis C when viewed in a direction along the first axis X. In the present embodiment, when the second winding 52 is traced from the first line end 52A to the second line end 52B, the second winding 52 is first in contact with the outer peripheral surface of the core portion 11 at the 1.0-turn point B1. The 1.0-turn point B1 of the second winding 52 does not need to be in contact with the outer peripheral surface of the core portion 11.
In addition, the number of turns is increased by one each time the second winding 52 makes one turn about the central axis C from the first line end 52A toward the second line end 52B. The second winding 52 is wound around the core portion 11 to proceed in a clockwise direction as the number of turns increases when viewed in the first negative direction X2. That is, the second winding 52 is wound in the same direction as the first winding 51. A part of the second winding 52 is wound around the core portion 11 from the outer side portion with respect to the first winding 51. In other words, a part of the second winding 52 is in contact with the outer surface of the first winding 51 on the side opposite to the central axis C.
As shown in
As shown in
The second winding 52 has a first intersection point CP1 intersecting the first winding 51 from the first line end 51A to the 1.0-turn point A1 from the outer side portion. The first intersection point CP1 is present in a range of 1.0 turn or more and less than 2.0 turns (i.e., from 1.0 turn to less than 2.0 turns) of the second winding 52. Specifically, the first intersection point CP1 is a point of approximately 1.8 turns of the second winding 52. In addition, the first intersection point CP1 is located on the second negative direction Y2 side with respect to the central axis C. In this embodiment, a point at which the center line of the second winding 52 crosses the center line of the first winding 51 is defined as a “intersection point” when viewed in a direction orthogonal to the outer peripheral surface of the core portion 11, that is, in the third negative direction Z2.
As shown in
In addition, as shown in
Here, when the second winding 52 is traced from the first line end 52A to the second line end 52B side, a first point at which the second winding 52 first rides on the outer side portion of the first winding 51 at the 1.0-turn point A1 or a point of more turns is defined as a first ride point F. The first ride point F is present in a range of 2.0 or more turns and less than 3.0 turns (i.e., from 2.0 turns to less than 3.0 turns) of the second winding 52. Specifically, the first ride point F is located at a point of approximately 2.7 turns of the second winding 52. In the present embodiment, the point at which the center line of the second winding 52 first comes to the outer side portion with respect to the center line of the first winding 51 is defined as a ride point on the outer side portion. The “center line of the wire” is a line passing through the geometrical center of a section orthogonal to the extension direction of the wire. That is, at the point of the wire wound around the core portion 11, the center line of the wire extends in the winding direction. In addition, the “outer side portion” described above matches the outer side portion in the circumferential direction about the central axis C.
As shown in
As shown in
In addition, on the same section, a 3.0-turn point of the second winding 52 is located between a 2.0-turn point of the first winding 51 and a 3.0-turn point of the first winding 51 in the direction along the central axis C. In the direction along the central axis C, a 4.0-turn point of the second winding 52 is located between a 3.0-turn point and a 4.0-turn point of the first winding 51. In addition, the second winding 52 is also wound around the first winding 51 in the subsequent turns in the same manner. That is, when Nis any integer of 3 or more and less than 9 (i.e., from 3 to less than 9), the N-turn point of the second winding 52 is located between the (N−1)-turn point and the N-turn point of the first winding 51 in the direction along the central axis C.
In the common-mode choke coil 1 having the above-described configuration, the first 1.0-turn point A1 at a start of winding and a 9.0-turn point at an end of winding of the first winding 51 are separated from each other. In addition, the 1.0-turn point B1 of the second winding 52 at the start of winding is separated from the 9.0 turn-point at the end of winding.
In addition, the first winding 51 is wound at a distance of 1.0 turn or more in the direction along the central axis C at least at one or more points from the 1.0-turn A1 at the start of winding to a 9.0-turn point at the end of winding. In addition, the second winding 52 is wound at a distance of 1.0 turn or more in the direction along the central axis C at least at one or more points from the 1.0-turn point B1 at the start of winding to a 9.0-turn point at the end of winding.
In addition, the first winding 51 is wound with the second winding 52 disposed in between in the direction along the central axis C at least at one or more points from the 1.0-turn point A1 at the start of winding to a 9.0-turn point at the end of winding. In addition, the second winding 52 is wound with the first winding 51 disposed in between in the direction along the central axis C at least at one or more points from the 1.0-turn point B1 at the start of winding to a 9.0-turn point at the end of winding.
In addition, the first winding 51 is wound, in a range of 2.0 turns or more and less than 3.0 turns (i.e., from 2.0 turns to less than 3.0 turns) from the start of winding, with the second winding 52 disposed in between in the direction along the central axis C. In addition, the second winding 52 is wound, in a range of 2.0 turns or more and less than 3.0 turns (i.e., from 2.0 turns to less than 3.0 turns) from the start of winding, with the first winding 51 disposed in between in the direction along the central axis C.
As a result, the stray capacitance CC between the input and output of the first winding 51 and the second winding 52 of the common-mode choke coil 1 can be made smaller as compared to the related art.
The two-dot chain line-indicated path shown in
As a result, the switching power supply device 100 according to the embodiment can reduce the generation of common-mode noise by reducing the radiation of switching noise to the outside and the conduction of switching noise to the DC power supply, and can reduce the level of switching noise by the noise equalization circuit. That is, the switching power supply device 100 according to the embodiment can effectively reduce the radiation of the switching noise to the DC power supply and the outside, and can effectively reduce the generation of the common-mode noise due to noise propagation to the DC power supply.
In the common-mode choke coil according to the embodiment, as described above, the stray capacitance CC between the input and output can be decreased as compared to the related art. As a result, as shown in
Hereinafter, a specific example of a configuration capable of effectively reducing the generation of common-mode noise due to the noise propagation to the DC power supply via a stray capacitance on a multilayer circuit board will be described.
In the example shown in
More specifically, in the example shown in
As a result, the switching power supply device 100 according to Embodiment 1 includes an electric closed circuit by the first reference potential wiring pattern P−, the second reference potential wiring pattern L−, the DC positive potential wiring pattern P+, the input positive potential wiring pattern L+, the power conversion circuit 3, and the common-mode choke coil 1.
The switching noise generated due to the switching operation of the switching circuit 3B is confined by the electric closed circuit, and the common-mode noise that is conducted to the DC power supply is reduced. Since the phase of the continuously generated switching noise is not constant, the switching noise is confined in the electric closed circuit to cancel each other out. That is, this electric closed circuit functions as a noise equalization circuit that equalizes the switching noise to reduce the generation of the common-mode noise. In other words, the switching power supply device 100 includes a noise equalization circuit.
As a result, the switching power supply device 100 according to Embodiment 1 can reduce the generation of common-mode noise by reducing the radiation of switching noise to the outside and the conduction of switching noise to the DC power supply, and can reduce the level of switching noise by the noise equalization circuit. That is, the switching power supply device 100 according to Embodiment 1 can effectively reduce the radiation of the switching noise to the DC power supply and the outside, and can effectively reduce the generation of the common-mode noise due to noise propagation to the DC power supply.
By arranging and disposing the respective elements of the switching power supply device 100 in the order of the common-mode choke coil 1, the input capacitor CIN, the switching regulator IC (switching circuit 3B), and the output capacitor COUT in substantially one direction (for example, the X direction) in this order, it is possible to make it difficult to form an unintended stray capacitance.
In addition, in a configuration having four or more layers with a complex wiring structure, an unintended stray capacitance is likely to be formed. Therefore, it is more effective to apply to a configuration having four layers or more.
In the examples shown in
More specifically, in the example shown in
As a result, the first reference potential wiring pattern P−, the second reference potential wiring pattern L−, the DC positive potential wiring pattern P+, the input positive potential wiring pattern L+, the power conversion circuit 3, and the common-mode choke coil 1 function as a noise equalization circuit that equalizes the switching noise and reduce the generation of the common-mode noise, as in Embodiment 1.
As a result, the switching power supply device 100 according to Embodiment 2 can reduce the generation of common-mode noise by reducing the radiation of switching noise to the outside and the conduction of switching noise to the DC power supply, and can reduce the level of switching noise by the noise equalization circuit, as in Embodiment 1. That is, the switching power supply device 100 according to Embodiment 2 can effectively reduce the radiation of the switching noise to the DC power supply and the outside, and can effectively reduce the generation of the common-mode noise due to noise propagation to the DC power supply, as in Embodiment 1.
In the example shown in
More specifically, in the example shown in
As a result, the first reference potential wiring pattern P−, the second reference potential wiring pattern L−, the DC positive potential wiring pattern P+, the input positive potential wiring pattern L+, the power conversion circuit 3, and the common-mode choke coil 1 function as a noise equalization circuit that equalizes the switching noise and reduce the generation of the common-mode noise, as in Embodiment 1 and Embodiment 2.
As a result, the switching power supply device 100 according to Embodiment 3 can reduce the generation of the common-mode noise by reducing the radiation of the switching noise to the outside and the conduction of the switching noise to the DC power supply, and can reduce the level of the switching noise by the noise equalization circuit, as in Embodiment 1 and Embodiment 2. That is, the switching power supply device 100 according to Embodiment 3 can effectively reduce the radiation of the switching noise to the DC power supply and the outside, and can effectively reduce the generation of the common-mode noise due to noise propagation to the DC power supply, as in Embodiment 1 and Embodiment 2.
In the related art, a stray capacitance generated in a multilayer circuit board forms a leakage path of common-mode noise. As a result, the limit value (18 dBuV) is exceeded in the vicinity of 90 MHz.
On the other hand, in the configuration of Embodiment 2, the first reference potential wiring pattern P−, the second reference potential wiring pattern L−, the DC positive potential wiring pattern P+, the input positive potential wiring pattern L+, the power conversion circuit 3, and the common-mode choke coil 1 function as a noise equalization circuit so that the switching noise can be canceled out and the generation of the common-mode noise can be reduced.
Each of the above-described embodiments is for facilitating the understanding of the present disclosure and is not intended to limit the present disclosure. The present disclosure can be changed/improved without deviating from the gist of the present disclosure, and the present disclosure also includes equivalents thereof.
The present disclosure can have the following configuration as described above or instead of the above.
In this configuration, the low-frequency noise generated due to the switching operation of the switching element is confined by the low-frequency band blocking filter, and the low-frequency noise that is conducted to the DC power supply is reduced. In addition, the high-frequency noise generated due to the switching operation of the switching element is confined by the high-frequency band blocking filter, and the high-frequency noise that is conducted to the DC power supply is reduced. Since the phase of the continuously generated noise is not constant, the noise is confined in the electric closed circuit to cancel each other out. As a result, it is possible to effectively reduce the radiation of the switching noise to the DC power supply and the outside, and to effectively reduce the generation of common-mode noise due to noise propagation to the DC power supply.
With this configuration, it is possible to effectively reduce common-mode noise in the low-frequency band and the high-frequency band.
With this configuration, it is possible to effectively reduce common-mode noise in the low-frequency band and the high-frequency band.
With this configuration, it is possible to effectively reduce common-mode noise in the low-frequency band and the high-frequency band.
With this configuration, the stray capacitance between the input and output of the first winding and the second winding can be decreased.
With this configuration, the stray capacitance between the input and output of the first winding and the second winding can be decreased.
With this configuration, the stray capacitance between the input and output of the first winding and the second winding can be decreased.
With this configuration, the stray capacitance between the input and output of the first winding and the second winding can be decreased.
In this configuration, the switching noise generated due to the switching operation of the switching element is confined by the electric closed circuit, and the common-mode noise that is conducted to the DC power supply is reduced. Since the phase of the continuously generated switching noise is not constant, the switching noise is confined in the electric closed circuit to cancel each other out. As a result, it is possible to effectively reduce the radiation of switching noise to the DC power supply and the outside, and to effectively reduce the generation of common-mode noise due to noise propagation to the DC power supply.
In this configuration, an electric closed circuit is formed by the first reference potential wiring pattern, the second reference potential wiring pattern, the DC positive potential wiring pattern, the input positive potential wiring pattern, the power conversion circuit, and the common-mode choke coil. As a result, it is possible to effectively reduce the radiation of switching noise to the DC power supply and the outside, and to effectively reduce the generation of common-mode noise due to noise propagation to the DC power supply.
In this configuration, an electric closed circuit is formed by the first reference potential wiring pattern, the second reference potential wiring pattern, the DC positive potential wiring pattern, the input positive potential wiring pattern, the power conversion circuit, and the common-mode choke coil. As a result, it is possible to effectively reduce the radiation of switching noise to the DC power supply and the outside, and to effectively reduce the generation of common-mode noise due to noise propagation to the DC power supply.
With this configuration, it is possible to make it difficult for an unintended stray capacitance to be formed on the multilayer circuit board.
With this configuration, it is possible to reduce the leakage of noise to the battery.
With this configuration, it is possible to reduce the leakage of noise to the commercial power supply.
According to the present disclosure, it is possible to realize a switching power supply device with an enhanced noise reduction effect.
Number | Date | Country | Kind |
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2023-151537 | Sep 2023 | JP | national |