Claims
- 1. A method of forming a core comprising the steps of;
- providing at least one sheet of material,
- said material comprising a sheet of cloth having fibers and interstices between the fibers,
- a first coating of a selected thermosetting resin surrounding said fibers and filling some, but not all of said interstices, with essentially all of said interstices unfilled,
- a second coating of said selected thermosetting resin disposed over said first coat and with said second coating essentially filling all of said interstices unfilled by said first coating,
- said first coating being cured sufficiently beyond B stare cure so that it has not dissolved in the uncured resin of the second coating,
- said second coating being B stage cured: and
- transition zone between said first and second coatings that is smooth, substantially continuous wit crosslinking between said first and second coatings providing an essentially continuous polymer of two layers, and
- laminating said at least one sheet of material between the metal sheets by application of pressure and heat sufficient to essentially fully cure said resins impregnated in the cloth whereby to substantially reduce pin hole defects.
- 2. The method as defined in claim 1 further characterized by forming an integrated circuit chip carrier from said core.
RELATED APPLICATIONS
This is a divisional of application Ser. No. 08/716,815, filed on Sep. 10, 1996, now U.S. Pat. No. 5,719,090.
Application Ser. No. 08/716,813, filed Sep. 10, 1996, now U.S. Pat. No. 5,780,366, for "Technique for Forming Resin-Impregnated Fiberglass Sheets" (Attorney Docket No. EN9-96-029).
Application Ser. No. 08/716,814, filed Sep. 10, 1996, now U.S. Pat. No. 5,986,403, for "Technique for Forming Resin-Impregnated Fiberglass Sheets Using Multiple Resins" (Attorney Docket No. EN9-96-030).
US Referenced Citations (17)
Foreign Referenced Citations (3)
Number |
Date |
Country |
61-248529 |
Nov 1986 |
JPX |
4-153230 |
May 1992 |
JPX |
5-078945 |
Mar 1993 |
JPX |
Non-Patent Literature Citations (1)
Entry |
"Prepreg Manufacturing Process," F.W. Haining and D.G. Herbaugh, IBM Technical Disclosure Bulletin, vol. 20, No. 11B, Apr., 1978 B, p. 4723. |
Divisions (1)
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Number |
Date |
Country |
Parent |
716815 |
Sep 1996 |
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