Claims
- 1. In an integrated circuit semiconductor chip device including integrated ccircuitry and electrically conductive terminals on the chip surface, said surface limited by chip edge boundaries, said terminals connected to said integrated circuitry and adapted to be connected to external leads for communication between the external leads and the integrated circuitry, the improvement comprising:
- said terminals being disposed as a group array located over a predetermined area of the chip surface spaced inwardly from the chip edge boundaries, said area terminating at area boundaries, at least one area boundary and the geometric center of said area being closer to the center of the chip surface than the closest directly opposite chip edge boundary.
- 2. The improvement in an integrated circuit device as claimed in claim 1, wherein said chip surface includes at least one central zone equidistant from at least one pair of opposite edge boundaries and said array of terminals is disposed in said central zone.
Priority Claims (1)
Number |
Date |
Country |
Kind |
3639630 |
Nov 1986 |
DEX |
|
Parent Case Info
This application is a division of application Ser. No. 07/117,541, filed 11-6-87, now U.S. pat. No. 4897,534.
US Referenced Citations (13)
Foreign Referenced Citations (2)
Number |
Date |
Country |
3338597 |
Oct 1983 |
DEX |
2166589 |
May 1986 |
GBX |
Divisions (1)
|
Number |
Date |
Country |
Parent |
117541 |
Nov 1987 |
|