BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will become more fully understood from the detailed description given herein below for illustration only, and which thus is not limitative of the present invention, and wherein:
FIG. 1 is a sectional view of a conventional circuit board substrate;
FIG. 2 is a flow chart of a test method of an embedded capacitor according to a first embodiment of the present invention;
FIG. 3 is a flow chart of an embodiment of Step 110 in FIG. 2;
FIG. 4 is a flow chart of the test method of an embedded capacitor according to a second embodiment of the present invention;
FIG. 5 is a flow chart of the test method of an embedded capacitor according to a third embodiment of the present invention;
FIG. 6A is a flow chart of the test method of an embedded capacitor according to a fourth embodiment of the present invention;
FIG. 6B is a flow chart of the test method of an embedded capacitor according to a fifth embodiment of the present invention;
FIG. 7A is a flow chart of the test method of an embedded capacitor according to a sixth embodiment of the present invention;
FIG. 7B is a flow chart of the test method of an embedded capacitor according to a seventh embodiment of the present invention;
FIG. 8 is a flow chart of establishing a model database in the test method of an embedded capacitor according to a first embodiment of the present invention;
FIG. 9 is a flow chart of establishing the model database in the test method of an embedded capacitor according to a second embodiment of the present invention;
FIG. 10 is a flow chart of establishing the model database in the test method of an embedded capacitor according to a third embodiment of the present invention;
FIG. 11A is a flow chart of establishing the model database in the test method of an embedded capacitor according to a fourth embodiment of the present invention;
FIG. 11B is a flow chart of establishing the model database in the test method of an embedded capacitor according to a fifth embodiment of the present invention;
FIG. 12 is a general structural view of a test system of embedded capacitor according to a first embodiment of the present invention; and
FIG. 13 is a general structural view of the test system of embedded capacitor according to a second embodiment of the present invention.