The invention relates to electronic semiconductor devices and manufacturing. More particularly, the invention relates to designs for promoting heat egress from packaged semiconductor devices and to methods for the manufacture of the same.
In conventional semiconductor device packages, a semiconductor chip is mounted on a metallic leadframe with metallic connections and/or an adhesive material. Bond wires or contact pads on the chip are coupled with contact pads incorporated into the surface of the substrate. An encapsulant material forms a protective covering over the chip, bond wires, and some or all of the leadframe. Reductions in package size are constantly being pursued in the arts. With size reduction comes a high interconnection density, which can lead to a concentration of excess heat generated during operation of the circuitry. In general, the semiconductor chip in the packaged device generates heat when operated and cools when inactive. Due to the changes in temperature, the package as a whole tends to thermally expand and contract. However, in many cases the thermal expansion behavior of the package, its internal components, e.g., chip, leadframe, and underlying PCB, can differ, causing stresses to occur at the connecting joints, or within the layers of the package, or among the components of the IC chip itself.
The excess heat making its departure from an IC package common in the arts may be understood in terms of following three thermal paths. One potential thermal path is in the lateral, planar directions. Typically, the chip is isolated in all planar directions by surrounding mold compound, however, which generally has poor heat conduction properties, limiting this potential thermal path. In packages with multilayer substrates, heat can be spread out laterally somewhat as it travels toward the top or bottom layers, but these paths are necessarily limited by the area of the package, which in most cases is intentionally minimized.
The thermal paths through the “bottom” and “top” of the chip are therefore usually the most beneficial. Of course, a package may be inverted, and the top and bottom of the package are relative to its orientation. Herein, as is common in the art, the terms “bottom” and “top” refer to the substrate or PCB side of a package, and the opposite, molded side, respectively. The thermal path from the “bottom” of the chip, that is, through the substrate, is often the most direct. This path is sometimes improved by the addition of thermal vias or thermal solder balls designed to increase heat conduction through the chip and substrate and into the PCB beyond the package. To further address the problem of dissipating excess heat, packaged semiconductor devices are known in the arts which are characterized by a heat spreader interposed between the semiconductor chip and the PCB. The heat spreader is typically made from copper or other metal or from ceramic or other material selected for its heat conduction properties. This technology, however, has its own problems. One problem is related to assembly of the package on the PCB. Manufacturing and interposing the heat spreader between the semiconductor chip and the PCB complicates production procedures, resulting in increased costs. Also, there are various challenges to permanently attaching the heat spreader to the substrate, and in sealing the junctions between the heat spreader, chip, and substrate. Also, owing to the rigid attachment of the heat spreader to the PCB, there may be a degradation in reliability of the device due to the effects of thermally-induced stresses. Additionally, although it is desirable to make the heat spreader large in order to dissipate heat more effectively, larger sizes can lead to further problems such as increased susceptibility to warpage or decreased reliability under stress.
Heat may also travel from the chip through the “top” of the package. This is typically a relatively poor heat path due to inherent heat resistance of the encapsulant material covering the chip. It is known in the arts to attempt to improve this thermal path by the addition of an external heat sink to the outside of the package. Although sometimes helpful, this approach is necessarily limited by the inefficient heat transfer characteristics of the intervening mold compound. It is also known in the arts to use mold compound material having improved heat-conduction properties, but this approach is hampered by the shortcomings of such material, which, for example, may have a coefficient of thermal expansion dissimilar to that of other package components, can be relatively expensive, and is less effective at transferring heat than material such as metal.
In a flip-chip package, a chip is mounted on a substrate such as a PCB board or leadframe in a “flipped” or “face down” posture by means of conductive bumps, such as aluminum or copper bond pads on the surface of the chip. Electrical connections are achieved by connecting the conductive bumps provided on the surface of the chips with bond pads on the substrate. The flip-chip connection to the underlying substrate is generally formed using a reflow process. After the chip is attached, underfill is added between the chip and the substrate for strength and durability. Because flip-chips do not require wirebonds, their size is relatively small in comparison to their wirebonded counterparts. The metal connections between the chip surface and underlying substrate can provide a direct thermal path through the “bottom” of the package for the egress of heat produced during the operation of the chip. The potential for improved heat egress through the “top” of the mounted chip is limited in conventional packages however, which typically entirely engulf the chip in encapsulant, impeding heat transmission.
In addition to the problems identified above, thermal enhancements known in the arts for IC packages are faced with the additional problem of tending to increase the cost of the overall package. In general, to the extent the standard assembly process is disrupted, process efficiency and yields decrease, and costs increase. Due to these and other problems, it would be useful and advantageous to provide semiconductor packages, particularly relatively small packages such as for example QFN and other high-density flip-chip packages, with improved thermal conduction properties, and to provide manufacturing methods for the same.
In carrying out the principles of the present invention, using methods compatible with established manufacturing processes, packaged microelectronic semiconductor devices are provided with improved thermal paths for promoting the egress of heat from the chip, and ultimately from the package. In general, in accordance with preferred embodiments, the egress of heat from the chip to the outside the package is facilitated by refraining from blocking advantageous thermal paths with mold compound, and further by enhancing thermal paths.
According to one aspect of the invention, a method for assembling a semiconductor device package includes a step of providing a flip-chip assembly. The flip-chip assembly has a leadframe with a chip attached. A thermal pad is affixed to the exposed surface of the chip. The assembly is encapsulated in order to encase the chip while leaving the surface of the thermal pad exposed at the outer surface of the package.
According to other aspects of the invention, method steps are included in alternative preferred embodiments whereby a thermal pad is affixed to the chip using die attach film or curable die attach adhesive.
According to another aspect of the invention, in a preferred embodiment, a method for assembling a semiconductor device package includes steps of applying die attach film to the surface of a thermal pad and placing the prepared thermal pad into a mold. In a further step, the thermal pad is affixed to a surface of a chip by placing the flip-chip assembly into the mold to make contact with the die attach film.
According to yet another aspect of the invention, a flip-chip assembly is encapsulated prior to affixing an external thermal pad to an exposed surface of the chip.
According to another aspect of the invention, a flip-chip assembly includes a leadframe having a chip affixed to the leadframe. The chip is provided with an integrated thermal pad, the surface of which remains exposed in the final package.
According to still another aspect of the invention, a flip-chip assembly includes a leadframe having a chip affixed to the leadframe. The chip is provided with an integrated thermal pad. An external thermal pad is affixed to the surface of the chip, the external thermal pad remaining exposed in the final package.
The invention has advantages including but not limited to providing methods and devices offering improvements in facilitating heat egress from semiconductor device packages. This and other features, advantages, and benefits of the present invention can be understood by one of ordinary skill in the arts upon careful consideration of the detailed description of representative embodiments of the invention in connection with the accompanying drawings.
The present invention will be more clearly understood from consideration of the following detailed description and drawings in which:
References in the detailed description correspond to like references in the various drawings unless otherwise noted. Descriptive and directional terms used in the written description such as first, second, top, bottom, upper, lower, side, and so forth, refer to the drawings themselves as laid out on the paper and not to physical limitations of the invention unless specifically noted. The drawings are not to scale, and some features of embodiments shown and discussed are simplified or amplified for illustrating the principles, features, and advantages of the invention.
In general, the invention provides thermally enhanced IC package assemblies with improved paths for the egress of heat produced in the IC. As shown and described herein, preferred embodiments of the invention produce one or more useful advantages.
Now referring primarily to
A cutaway side view of an example of a preferred embodiment of a thermally enhanced semiconductor device package 20 is shown in
The possible variations within the scope of the invention are numerous and cannot all be shown. Another example of a preferred embodiment of a package system of the invention 20 is depicted in the cutaway side view of
Additional examples of preferred embodiments of thermally enhanced packages 20 of the invention are depicted in the cutaway side views of
A further example of an alternative embodiment of the invention is depicted in
The alternative embodiments of the invention depicted in
The invention provides advantages including but not limited to improved heat egress from microelectronic semiconductor device packages, increased package reliability, and reduced costs. While the invention has been described with reference to certain illustrative embodiments, the methods and systems described are not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments as well as other advantages and embodiments of the invention will be apparent to persons skilled in the art upon reference to the description and claims.
This application claims priority based on Provisional Patent Application Ser. No. 60/871,992 filed on Dec. 27, 2006, which is incorporated herein for all purposes by this reference. This application and the Provisional Patent Application have at least one common inventor and are assigned to the same entity.
Number | Date | Country | |
---|---|---|---|
60871992 | Dec 2006 | US |