Patent Application
20150131248
The present invention relates generally to electronic circuits and systems, and particularly to assembly of integrated circuits and other components in such circuits and systems.
Modern electronic devices contain ever larger numbers of components and increasing degrees of complexity. At the same time, designers are required to fit these components into ever smaller end-products.
These conflicting demands have led to the development of highly-integrated approaches to chip design and packaging. For example, multi-chip modules (MCMs) typically contain multiple integrated circuits (ICs) or semiconductor dies, and possibly discrete components, as well, on a unifying substrate. The MCM can then be assembled as a single component onto a printed circuit board. Some advanced MCMs use a “chip-stack” package, in which semiconductor dies are stacked in a vertical configuration, thus reducing the size of the MCM footprint (at the expense of increased height). Some designs of this sort are also referred to as a “system in package.”
As an example of this sort of design, U.S. Pat. No. 5,905,635 describes an assembly of electronic modules with a support structure. Each electronic module is in the form of electronic components stacked on at least two levels, which are separated by an intermediate layer. Each electronic module comprises at least one hole formed in the intermediate layer, while the support structure comprises at least one rod element that is introduced into respective holes of successive modules.
Although IC chips are usually mounted on the surface of an MCM or printed circuit substrate, in some designs an IC may be mounted in a recess in the substrate. For example, U.S. Pat. No. 7,116,557 describes an imbedded component integrated circuit assembly, in which IC components are imbedded within a laminate substrate disposed on a thermally conductive core, which provides a thermal sink. The circuit components are electrically connected to the IC via flexible electrical interconnects, such as flexible wire bonds. An electrically-insulating coating is deposited upon the flexible electrical interconnects and upon the exposed surfaces of the integrated circuit assembly. A thermally-conductive encapsulating material encases the circuit components and the flexible electrical interconnects within a rigid or semi-rigid matrix.
Embodiments of the present invention that are described hereinbelow provide a novel three-dimensional (3D) design approach for electronic integration.
There is therefore provided, in accordance with an embodiment of the present invention, an electronic module, which includes a substrate including a dielectric material having a cavity formed therein. First conductive contacts within the cavity are configured for contact with at least one first electronic component that is mounted in the cavity. Second conductive contacts on a surface of the substrate that surrounds the cavity are configured for contact with at least a second electronic component that is mounted over the cavity. Conductive traces within the substrate are in electrical communication with the first and second conductive contacts.
In a disclosed embodiment, the conductive contacts include first contact pads on the substrate, which are configured to physically and electrically contact second contact pads on a lower surface of the electronic components. Typically, the second electronic component is selected from a group of components consisting of integrated circuit chips and interposers, while the at least one first electronic component is selected from a further group of components consisting of further integrated circuit chips and discrete components.
In some embodiments, the conductive traces include vias, which pass through the substrate in a direction perpendicular to the surface of the substrate that surrounds the cavity. The vias may be laid out on a predefined grid or disposed at a set of predefined angles relative to each of the contacts. Typically, at least one of the vias is configured to connect one of the first conductive contacts with one of the second conductive contacts. Additionally or alternatively, the module includes a plurality of contact pads on an exterior surface of the substrate for contacting a printed circuit board, wherein at least one of the vias is configured to connect one of the conductive contacts with one of the contact pads on the exterior surface.
In some embodiments, the conductive traces include conductive lines, which are disposed in one or more planes parallel to the surface of the substrate that surrounds the cavity. The conductive lines may have a non-uniform thickness. The module may include a plurality of contact pads on a side of the substrate, which is perpendicular to the surface of the substrate that surrounds the cavity, wherein at least one of the conductive lines is configured to connect one of the conductive contacts with one of the contact pads on the side of the substrate. Additionally or alternatively, the conductive lines may include at least first lines, which are disposed in a first plane defined by an inner surface of the cavity, and second lines, which are disposed in a second plane, which contains the surface of the substrate that surrounds the cavity.
In disclosed embodiments, the module includes one or more discrete electronic components embedded in or on an outer surface of the substrate. The discrete electronic components or entire module may be configured and trimmed so as to meet a predefined operational specification. Typically, the components that are embedded in or on the outer surface of the substrate are selected from a group of components consisting of resistors, flat capacitors, interdigital capacitors, and inductors.
In some embodiments, the cavity within which the first conductive contacts are disposed is an inner cavity, and the surface of the substrate that surrounds the inner cavity, on which the second conductive contacts are disposed, is an inner surface, while the substrate has an outer cavity that is configured to contain the at least one second electronic component and is surrounded by an outer surface of the substrate, on which third conductive contacts are disposed, configured for contact with at least a third electronic component that is mounted over the outer cavity.
In alternative embodiments, the cavity is formed in a first side of the substrate, and the substrate is configured for mounting of one or more third electronic components on a second side of the substrate, opposite the first side. In one such embodiment, the cavity formed in the first side of the substrate is a first cavity, and a second cavity is formed in the second side of the substrate and is configured to contain at least one of the third electronic components, which is mounted in the second cavity. The second side of the substrate may be configured for mounting of at least another of the third electronic components over the second cavity.
There is also provided, in accordance with an embodiment of the present invention, an electronic assembly, including at least first and second modules coupled together electrically and mechanically. Each of the modules includes a substrate including a dielectric material having a cavity formed therein. First conductive contacts within the cavity are configured for contact with at least one first electronic component that is mounted in the cavity, while second conductive contacts on a surface of the substrate that surrounds the cavity are configured for contact with at least a second electronic component that is mounted over the cavity. Conductive traces within the substrate are in electrical communication with the first and second conductive contacts.
In a disclosed embodiment, at least the first and second modules include respective contact pads on exterior surfaces of the modules, wherein the contact pads are connected to the conductive traces and are coupled within the assembly to provide electrical communication between at least the first and second modules.
In some embodiments, at least the first module is stacked on the second module in the assembly. The first module may be stacked so that a lower surface of the substrate of the first module, opposite the cavity in the first module, covers and encloses the cavity that is formed in the second module. Alternatively, the first module is stacked so that the cavity in the first module faces into the cavity that is formed in the second module.
Further alternatively, the first module is connected to the second module by contact pads on a side of the first module that is perpendicular to the surface of the substrate of the first module that surrounds the cavity in the first module. In this case, the first module may be oriented so that the cavity in the first module and the cavity in the second module open in respective directions that are mutually parallel or that are mutually perpendicular.
In another embodiment, the assembly includes a dielectric base, wherein at least the first and second modules are mounted side-by-side on a surface of the dielectric base, while the cavity in the first module and the cavity in the second module open in a direction that is perpendicular to the surface.
There is additionally provided, in accordance with an embodiment of the present invention, a method for producing an electronic module. The method includes providing a substrate including a dielectric material having a cavity formed therein, having first conductive contacts within the cavity, second conductive contacts on a surface of the substrate that surrounds the cavity, and conductive traces within the substrate in electrical communication with the first and second conductive contacts. At least one first electronic component is mounted within the cavity in contact with the first conductive contacts. At least a second electronic component is mounted over the cavity, on the surface of the substrate that surrounds the cavity, in contact with the second conductive contacts.
The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:
Embodiments of the present invention that are described herein provide a new type of electronic module that enables multiple IC chips and other components (including passive discrete components, as well as microelectromechanical, optical and other multifunctional parts) to be mounted together with high component density in a three-dimensional (3D) assembly. Such modules create a platform suitable for components manufactured by different fabrication processes and support incorporation of special materials into 3D designs. This module design also optimizes heat dissipation and thus improves system power capability, while integrated interconnections ensure a high level of reliability. Modules in accordance with embodiments of the present invention are useful in optimizing system performance and reducing product cost and time to market.
In the disclosed embodiments, an electronic module comprises a dielectric substrate having a cavity. (This sort of substrate with one or more cavities is equivalently referred to herein as a “frame.”) Conductive contacts within the cavity permit one or more electronic components, which may be discrete components or ICs, to be mounted on the surface of the substrate within the cavity. Additional conductive contacts on the surface of the substrate that surrounds the cavity can be used to mount one or more additional electronic components, such as an integrated circuit or interposer, over the cavity. The cavity may have two or more nested layers, thus allowing components to be mounted at three or more levels. Discrete components may also be embedded in the substrate itself.
Conductive traces within the substrate connect to the conductive contacts on the surface of the substrate (within and on the surface surrounding the cavity). The traces can be laid out as desired to provide the appropriate connections between the components, as well as to contact pads on the outer surface of the substrate. These outer contact pads can be used to mount the module on a printed circuit board, as well as to connect multiple modules together into a larger assembly.
Embodiments of the present invention implement the following design principles:
The dielectric frame that is used in the disclosed embodiments has many advantages, including the following:
1. A wide range of dielectric materials may be used, including, for example, both laminates and ceramics (such as low temperature co-fired ceramic—LTCC).
2. Cost effective manufacturing technologies can be used to produce the frame.
3. The frame has excellent high-frequency properties for use in radio frequency (RF) circuit applications.
4. Existing assembly techniques can be used in assembling components on the frame.
5. The open-cavity design of the frame makes it suitable for use with microelectromechanical systems (MEMS) and optical components, as well as electronic components.
6. Open cavities of different sizes, as shown in the embodiments described below, enable simultaneous mounting of chips from smaller parts on the bottom layers to larger ICs and interposers on the top, without the need for expensive chip embedding to build true 3D multilayer structures with high component density.
7. A ground plane may be formed on the back side of the frame.
8. After component assembly, the frame may optionally be encapsulated, using existing techniques and materials.
9. The flexible design principles enable optimization of module performance by producing each component (including both discrete components and ICs) using the most suitable material and manufacturing techniques. The performance of each part can thus be optimized at an early design stage. Internal, non-inductive connections enable high-speed, low-loss interconnection of components.
10. The frame design supports enhanced reliability. Each part can be pre-tested. The design also allows trimming of the entire assembled module and thus may improve its performance. Heat dissipation can be optimized using the proper interconnections and special materials with high thermal conductivity. ICs with flip-chip or chip-scale form factors can be used for cost-effectiveness and reliability. Modules may be encapsulated, as noted above.
11. As described below, single frames may function as 3D building blocks. These building blocks enable fabrication and assembly of larger, more complicated, multidimensional structures with higher hierarchies.
12. The modularity of these embodiments provide many other benefits in respect to cost, power budget, mechanical stress relief, speed enhancement, and system features such as standardization of testing programs.
Substrate 21 may comprise any suitable electrically-insulating material. For example, LTCC (ceramic) provides excellent heat transfer and thus facilitates cooling of the components, whereas a laminate is particularly cost-effective in producing multilayer structures. Alternatively, an elastic polymer may be used to provide improved absorption of mechanical vibrations, or other suitable dielectric materials that are known in the art may be chosen depending on system requirements.
Electronic components are mounted in a 3D array in module 20. Components 32 (which may typically be discrete components or ICs) are mounted on the surface of layer 26 within cavity 42. Another component 30, such as an IC, is mounted over cavity 42, on the surface of layer 24 that surrounds the cavity. (Layer 24, and similarly layer 22, may surround the corresponding cavities 42 and 40 on all sides or only on two or three sides.) Yet another component 28, such as an IC or interposer, is mounted over cavity 40, on the surface of layer 22. (Interposers typically comprise simple IC chips with suitable interconnections.) The ICs and discrete components in module 20 may be contained in chip-scale or flip-chip packages or may be assembled as bare dies. Some discrete components 34 can be also embedded in substrate 21, as explained further hereinbelow.
The electronic components mounted on and in module are connected by conductive traces running on and through substrate 21, as shown in the figures that follow. These traces typically include vias 36, which pass through substrate 21 in a direction perpendicular to the surfaces in and surrounding cavities 40 and 42 on which the components are mounted (i.e., in the Z-direction), as well as conductive lines disposed in X-Y planes that are parallel to the component mounting surface, as shown, for example in
Module 20 is configured for mounting on a larger underlying substrate, such as a printed circuit board (PCB), using contact pads 37 and/or 38 on the exterior surfaces of substrate 21. Alternatively or additionally, contact pads 37 and/or 38 may be used for connecting module 20 to other modules, as shown, for example, in
Vias 36 and lines 48 are connected to the components by conductive contact pads 46 formed on the surfaces of layers 22, 24 and 26 of substrate 21. Contact pads 46 make physical and electrical contact with conductive pads 44 on components 28, 30 and 32, using suitable soldering or other bonding techniques. Thus, these components may be connected the external contact pads (such as pad 38) of module 39, as well as to one another, by means of vias 36 and lines 48 extending between contact pads 46, at either the same or different levels of the substrate.
Via patterns can be specially designed and produced for each specific module, but the design process can be simplified and production cost reduced by providing standard via patterns for similar packages. For such standard patterns, all available vias may be produced, but only some of them may be connected to components by conductive lines, depending on the electrical scheme of the module.
In the scheme shown in
Regardless of the sort of layout that is chosen, drilling and metal plating are typically the most suitable techniques for producing vertical vias in laminated substrates. The drilling can be performed mechanically or by laser, followed by copper plating using methods that are known in the art. Reliable, non-inductive contact can generally be achieved in this manner with via diameters in the range of 50-350 microns (although larger and smaller vias are also possible).
For ceramic substrates, thick-film techniques are typically the most suitable. In this case, openings for vias are mechanically prepared in each layer of the ceramic green tape that is used in producing the substrate. Screen printing of silver, palladium-silver, or other metal paste is used to fill these openings with conductive material. A multilayer structure made of the ceramic green tape is then pressed together and sintered. In order to connect components with side terminations, thick conductive lines (traces) can be used instead of or together with vias.
For laminated substrates, thick metal cladding (generally in the range of 150-600 microns, although larger and smaller thicknesses may alternatively be used) is typically the most suitable technique for producing traces 82, 84. Metal traces up to 250 mils thick in copper and up to 500 mils in aluminum can be produced using cladding techniques that are known in the art. Such a thickness is more than enough to produce reliable and non-inductive traces in the thickness range defined above. Various techniques can be used in patterning of the thick metal (for laminate frames), such as photochemical, micro-mechanical, and laser-based techniques, as are known in the art.
Transverse conductive lines 82, 84 may be of uniform or non-uniform thickness. For example, the termination of transverse line 84 at side contact 37 may include a thick part 86 close to contact 37. This thicker part may improve termination contact for traces with thickness up to 250 microns. This sort of variable trace thickness may also be useful for transverse connections of vertical vias. A minimal metal thickness may be used elsewhere to provide reliable and non-inductive contact, easy manufacturing of multilayer structures, and cost-effective metal patterning.
To summarize, the sequence of steps in producing a 3D module as described above with a laminated substrate may include the following:
For ceramic substrates, thick metal traces (connecting to side contacts or vias) can be built by multi-screen printing of conductive thick-film paste, which simultaneously allows patterning of the trace. In this sort of module, trace thickness in the range of 150-250 microns is typically desirable.
To summarize in this case, for ceramic technology, the sequence of steps in production of a 3D module may be as follows:
New 3D printing (additive manufacturing) techniques are also suitable for frame production. In this case, the 3D frame is just printed layer by layer with the desired combination of conductive materials for pads, lines and vias, and insulating material for the rest. This manufacturing technique is cost-effective for thick conductive horizontal traces and vertical vias in complicated patterns.
As illustrated schematically in
Additional techniques may be used to enhance and refine the properties of embedded components 34. For example, trimming techniques, such as laser trimming, may be used to fine-tune the component values in production. Additionally or alternatively, special materials, such as ferrites and ferroelectrics, may be incorporated in the components that are embedded in or on the outer surface the substrate for improved performance. These options are illustrated in the figures that follow. A number of specific components are described below, but the principles of trimming provided by the present embodiments can be applied to substantially any sort of trimmable component that can be embedded in or on the substrate in this manner.
Similarly, resistors, inductors and interdigital capacitors may be formed on the outer surface of one of the layers of a module, and then trimmed by similar techniques. For example, resistance and inductance values may be trimmed by narrowing the conductive lines, while capacitance is trimmed by removing a part of the electrodes. This approach allows testing and trimming of the entire module, either before or after the components of the module have been assembled. Such modules can be individually tested and trimmed in highly-standardized test programs by automatic equipment.
Alternatively or additionally, when trimming is not required, embedded components 34 may be contained entirely within one of the dielectric layers of the substrate, along with suitable conductive traces connecting to them. Circuit corrections may still be achieved, for example, by means of discrete components 32 mounted on the frame.
Various techniques may be used to embed components 32 in a layer of a module substrate (and in other layers within the dielectric frame of a module, whether or not the component surfaces are to be available for subsequent trimming). When the substrate comprises a laminate, the conductors and other elements making up the component (such as ferroelectric and/or magnetic elements) may simply be embedded at the appropriate stages in the process of lamination. On the other hand, ceramic substrates generally require high-temperature sintering, which can damage embedded components. Therefore, when a ceramic substrate is used, holes may be left in the substrate at the sintering stage for insertion of embedded components thereafter. After the components have been inserted, the holes may optionally be filled with a suitable encapsulation material.
The frame geometry of module 20 that is shown in
Although the preceding figures all show modules comprising only a single substrate frame, in the embodiments described below two or more of these modules may be coupled together electrically and mechanically to produce a single, integrated electronic assembly. This coupling is typically accomplished by joining together suitable contact pads on the exterior surfaces of the modules. For example, flip-chip terminations on any side of the substrates may be used for this purpose. This approach enables incorporation of single modules into complicated 3D structures and arrays by soldering or bonding the frames to each other. It can be useful not only for electronic circuits, but also for optical and electro-mechanical devices, as well as some types of “system in package” products.
Modules 152, 154 and 156 contain respective cavities 160, 162 and 164. The modules are stacked in this embodiment so that the lower surface of the substrate in module 152 (opposite cavity 160) covers and encloses cavity 162 in module 154, while the lower surface of the substrate in module 154 covers and encloses cavity 164 in module 156.
This flexibility in placement of the contact pads, for mutual attachment of the modules, allows assemblies to be created in a wide variety of shapes and configurations.
It will be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and subcombinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art.
This application claims the benefit of U.S. Provisional Patent Application 61/648,098, filed May 17, 2012; U.S. Provisional Patent Application 61/654,888, filed Jun. 3, 2012; and U.S. Provisional Patent Application 61/670,616, filed Jul. 12, 2012. All of these provisional patent applications are incorporated herein by reference.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/IB2013/053749 | 5/9/2013 | WO | 00 |
| Number | Date | Country | |
|---|---|---|---|
| 61648098 | May 2012 | US | |
| 61654888 | Jun 2012 | US | |
| 61670616 | Jul 2012 | US |
