Plasma processing of a workpiece in the fabrication of integrated circuits, plasma displays, solar panels or the like requires uniform treatment of each workpiece across its surface. For example, in plasma processing of semiconductor wafers, feature sizes are on the order of nanometers, and uniformity and control of plasma ion distribution density across the workpiece surface is critical. Uniformity of distribution of etch rate or deposition rate across the surface of workpiece is required, as workpiece size (e.g., semiconductor wafer diameter) is increasing, and feature sizes are decreasing. Nora-uniformity in plasma processing can arise from non-uniformities or asymmetries in the reactor chamber electrical characteristics, non-uniformity in the distribution of process gases and flow rates, or non-uniformity in the application of RF power, for example. It is necessary to correct or compensate for such non-uniformities.
A plasma reactor for processing a workpiece includes a vacuum chamber, a workpiece support pedestal in the chamber having a workpiece support surface, a top electrode overlying the workpiece support surface and a bottom electrode underlying the workpiece support surface. Top and bottom RF power amplifiers are coupled to the top and bottom electrodes respectively. A clock signal source is coupled to the top and bottom RF power amplifiers, and a phase shifter is coupled between the clock signal source and at least one of the top and bottom RF power amplifiers, the phase shifter having a phase shifter control input. Top and bottom RF sensor probes, such as voltage probes, for example, are coupled to (or placed near) the top and bottom electrodes, respectively. A phase detector has respective inputs coupled to the top and bottom RF sensor probes and has an output. A user interface has an output defining a user-selected phase difference between the top and bottom sensor probes. A feedback controller has respective inputs coupled to the output of the phase detector and the output of the user interface. The feedback controller further has a feedback controller output coupled to the phase shifter control input.
The phase detector includes a frequency down conversion stage having respective inputs coupled to the RF sensor probes and respective outputs, and a phase comparator having an output and a pair of inputs coupled to the respective outputs of the frequency down conversion stage. In one embodiment, an integrator is coupled between the controller output and the phase shifter control input. The feedback controller is adapted to produce successive correction signals at the feedback controller output, and the integrator is adapted to provide to the phase shifter control input an average over n of the previous successive correction signals. In one embodiment, the successive correction signals correspond to a sampling period T, and wherein T is less than a settling time of one of the impedance matches by a factor greater than 10.
In one embodiment, the phase comparator includes respective sine wave-to-square wave converters coupled to the respective outputs of the frequency down conversion stage, and a phase lock loop phase comparator coupled to the respective sine wave-to-square wave converters. In another embodiment, the phase comparator comprises an IQ demodulator.
If two sets of top and bottom RF generators of different frequencies are present, then two phase detectors and two user interface outputs are compared to control two phase shifters controlling the two sets of generators. In this embodiment, either two feedback controllers are employed or a single feedback controller is multiplied between two sets of inputs arid outputs.
So that the manner in which the exemplary embodiments of the present invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings. It is to be appreciated that certain well known processes are not discussed herein in order to not obscure the invention.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
The plasma reactor described herein provides control of radial distribution of plasma ion density by controlling the phase difference between RF source power waveforms applied to opposing RF source power applicators above and below the surface of the workpiece being treated. In the description that follows, the opposing RF source power applicators are opposing electrodes. The RF power distribution at the surface of the workpiece affects plasma ion density, which in turn affects process rate distribution. The process may be an etch process or a deposition process, for example.
In general, RF power of the same frequency is applied to the two opposing electrodes. Maintaining a phase difference of 180° between the RF waveforms applied to the opposing electrodes causes the electric field lines to extend in a generally straight manner between the opposing electrodes, resulting in a center-high (edge-low) radial distribution of plasma ion density at the workpiece surface. Maintaining a phase difference of 0° between the RF waveforms applied to the opposing electrodes causes the electric field lines to extend in a radial direction from each of the opposing electrodes to the grounded side wall of the chamber enclosure, resulting in an edge-high (center-low) radial distribution of plasma ion density at the workpiece surface. In principle, the user should be able to select any degree of center-high or edge-high radial distribution of the plasma by selecting any phase angle or phase difference of the two electrodes in the range of 0° to 180°, and thereby reduce any observed non-uniformity in process rate distribution on the treated surface of the workpiece.
Measuring the phase difference between the top and bottom electrodes is most easily done taking measurements at the RF power generator output to the electrode. Such a measurement is typically inaccurate, because there is an RF impedance match circuit in the path to the electrode, which distorts the measurement.
One problem is that it is difficult to control the phase difference manually when the process recipe requires fast adjustment of the phase difference. The problem could be addressed by providing a feedback control loop responsive to a selection of the desired phase difference at a user interface. However, we have discovered that such a feedback control loop can be unreliable or unstable when responding to a phase difference between power waveforms of very high frequency on the opposing electrodes. Other sources of instability can lead to “dead-zones” in the 0° to 360° phase angle range, in which the feedback control loop cannot reach or hold a phase angle within the dead-zone.
Referring to
As shown in the enlarged view of
A top RF power amplifier 140 is synchronized with the output of a clock or oscillator 142. The top RF power amplifier 140 is coupled to the ceiling electrode 115 through a top RF impedance match circuit 145 by a top coaxial feed 147. A bottom RF power amplifier 150 of the same frequency as the top RF power amplifier 140, is coupled through a bottom RF impedance match circuit 155 to the workpiece support electrode 130 by a bottom coaxial feed 157. The top and bottom RF power amplifiers 140 and 150 output the same frequency, Fgen, which may be a VHP frequency suitable for a capacitively coupled plasma source. The bottom RF power amplifier 150 is synchronized to the clock 142 through a controllable phase shifter 151. The phase shifter 151 receives the signal from the clock 142 at its input port 151a and provides at its output port 151b a phase-shifted version of the output of the clock 142. The amount by which the signal at the output port 151b is phase-shifted from the signal at the input port 151a is determined by the phase shifter 151 in accordance with a control signal applied to its control input 151c. Control of the phase shifter 151 will be described in detail later herein. The term “phase shifter” as used in this specification includes any suitable device capable of shifting phase of an RF or oscillator signal in response to a control signal. Such a device may be a passive or active device, and may be implemented with passive variable reactance elements or active RF circuits or digital circuits, for example.
The side wall 105 is conductive and is connected to ground. The side wall 105 functions as a third electrode to the ceiling and workpiece support electrodes 115 and 130.
A top RF sensor probe 160 is placed near or on the ceiling electrode 115. The top RF sensor probe 160 may be of the type disclosed in related U.S. Patent Application Publication No. US-2012-0086464-A1 published Apr. 12, 2012 entitled IN-SITU VHF VOLTAGE/CURRENT SENSORS FOR A PLASMA REACTOR, by Hiroji Hanawa, et al. The RF sensor probe 160 may be an RF voltage probe or an RF sensor probe or other suitable probe. If the top RF sensor probe 160 is an RF voltage probe, then the top RF sensor probe 160 has a floating electrode in its sensor head that may be coupled to the center conductor of the top coaxial feed 147. Alternatively, for a sufficiently low frequency range (e.g., below 1 MHz) the floating electrode of the top RF sensor probe 160 may be coupled to the ceiling electrode, in which case the probe 160 may be on either side of the ceiling electrode 115 (i.e., either inside or outside of the enclosure 100), as indicated in dashed line in
A bottom RF sensor probe 165 is placed near the workpiece support electrode 130 or is coupled to the center conductor of the bottom coaxial feed 157. The bottom RF sensor probe 165 may be of the same type as the top RF sensor probe 160. The bottom RF sensor probe 165 has a floating electrode in its sensor head that may be coupled to the center conductor of the bottom coaxial feed 157. Alternatively, for a low frequency range (e.g., below 1 MHz), the floating electrode of the bottom RF sensor probe 165 may be coupled to the workpiece support 125 or electrode 130, in which case the probe 165 may be inside the enclosure 100, as indicated in dashed line in
If the bottom RF sensor probe 165 is coupled to the RF feed 157 at a significant distance from the support electrode 130, then a transform processor (not illustrated) may be used to improve accuracy of the measurement. The unillustrated transform processor provides a correction of the signal from the bottom RF sensor probe 165 to compensate for differences attributable to the distance between the bottom RF sensor probe 165 and the workpiece support electrode 130.
A pair of bandpass filters 171, 172 remove noise (such as noise attributable to plasma sheath harmonics) from the signals output by the RF sensor probes 160, 165 respectively. The phase detector 400 may include an optional down conversion stage 408 including a crystal-controlled local oscillator 180 having an output frequency Flo which differs from the RF power generator frequency Fgen of the top and bottom RF power amplifiers 140 and 150 by a difference frequency Fd. A bandpass filter 182 removes all but the local oscillator frequency Flo from the output of the local oscillator 180. The down conversion stage 408 further includes top and bottom channel mixers 184 and 186. The top channel mixer 184 combines the outputs of the top RF sensor probe 160 (filtered by the band pass filter 171) and the local oscillator 180 (filtered by the band pass filter 182) to produce a modulated top channel signal. A band pass filter 185 extracts the lower sideband (the difference frequency Fd) from the modulated top channel signal. The bottom channel mixer 186 combines the outputs of the bottom RF sensor probe 165 (filtered by the band pass filter 172) and the local oscillator 180 (filtered by the band pass filter 182) to produce a modulated bottom channel signal. A band pass filter 187 extracts the lower sideband (the difference frequency Fd) from the modulated bottom channel signal.
The outputs of the band pass filters 185 and 187 represent outputs of the top and bottom RF sensor probes 160 and 165 that have been down-converted in frequency (i.e., from Fgen to Fd). The RF power generator frequency Fgen may be a VHF frequency, while the down-converted frequency Fd may be in the medium frequency (MF) or low frequency (LF) band, for example. It should be noted that the down-conversion stage 408 may not be necessary in many applications and may be eliminated if desired.
The phase detector 400 further includes a phase comparator 194. In a first embodiment, the phase comparator 194 includes sine wave-to-square wave converters 190 and 192 and a phase lock loop (PLL) phase comparator 195. The down-converted version of the top RF sensor probe output (from the band pass filter 185) is converted to a square wave signal by the sine wave-to-square wave converter 190. The down-converted version of the bottom RF sensor probe output (from the band pass filter 187) is converted to a square wave signal by the sine wave-to-square wave converter 192. The PLL phase comparator 195 measures the phase difference between the signals produced by the pair of sine wave-to-square wave converters 190 and 192. The phase comparator 195 produces a phase difference signal representing the measured phase difference, which represents the phase angle between the outputs of the top and bottom RF sensor probes 160 and 165.
A low pass filter 200 filters the phase difference signal, and functions as a feedback loop filter. A feedback controller 210, which may be implemented as a microprocessor, senses a difference between the phase difference signal from the low pass filter 200 and a user-selected phase difference. The user-selected phase difference may be furnished to the feedback controller 210 from a user interface 215, such as a personal computer or other device having a keyboard or touch-sensitive screen or other input device. The feedback controller 210 produces a signal representing an error or difference between the user-selected phase difference (from the user interface 215) and the measured phase difference (from the phase comparator 195). This error signal is applied as corrective (negative) feedback to the control input 151c of the phase shifter 151. For example, if the measured phase difference is greater than the user-selected phase difference, then the error signal is applied to the control input 151c of the phase shifter 151 so as to decrease the phase difference established by the phase shifter 151. Similarly, if the measured phase difference is less than the user-selected phase difference, then the error signal is applied to the control input 151c of the phase shifter 151 so as to increase the phase difference established by the phase shifter 151. The error signal provided by the feedback controller 210 may be either an analog voltage or a digital signal, depending upon the design of the phase shifter 151.
The range of the voltage at the phase shifter control input required to swing the phase shifter 151 through the range of phase angles 0° through 360° may differ from the voltage range produced by the feedback controller 210 for these same angles. Therefore, an operational amplifier 220 may be employed at the output of the feedback controller 210 to provide the appropriate shift in voltage range.
The system of
The rate at which the feedback controller 210 produces the succession of error signals is determined by the sampling rate r at which the controller 210 samples the output of the phase detector 400. Stability of the feedback loop over a complete range of values (e.g., 0°-360°) of the user-selected phase difference is enhanced by establishing the sampling rate r to be sufficiently great so that the time between samples T=1/r is less than the settling time (t) of either or both of the impedance matches 145, 155, preferably by a factor of 10, or 100 or 1000, for example. The settling time, t, of each impedance match is the time required for the impedance match to complete a change in impedance in response to a sensed change in load impedance on the RF amplifier, and is principally a function of the speed of stepper motors (not shown in the drawing) controlling unillustrated. variable capacitors in the impedance matches 145 and 155. For example, the settling time, t, may be measured using a variable RF load connected to the output of the impedance match, making a discrete change in the impedance of the RF load, and observing the amount of time required for the impedance match to stabilize following the change.
The frequency down-conversion provided by the local oscillator 180 and the mixers 184 and 186 reduces the frequency of the signals processed by the phase comparator 195 down to a value within the range or capability of the phase comparator 195. The phase comparator 195, the sine wave-to-square wave converters 190 and 192, the mixers 184 and 186, the band pass filters 185 and 187, the band pass filter 182 and the local oscillator 180 together constitute a phase detector 400 having first and second inputs 402 and 404 and an output 406.
The frequency down-conversion provided by the local oscillator 180 and the mixers 184 and 186 reduces the frequency of the signals processed by the IQ demodulator 300 down to a value within the range or capability of the IQ demodulator 300.
In the embodiments of
In the foregoing embodiments, one of the two RF power amplifiers 140 and 150 is controlled directly by the clock 142, while the other is slaved to a phase-shifted version of the clock signal.
A first phase detector 400a having inputs 402a and 404a provides at an output 406a a first measured phase difference Δθ1M between the outputs of the first pair of bandpass filters 171a and 172a. A second phase detector 400b having inputs 402b and 404b provides at its output 406b a second measured phase difference Δθ2M between the outputs of the second pair of bandpass filters 171b and 172b. Each of the two phase detectors 400a and 400b may be identical to the phase detector 400 of
Each phase detector 400a and 400b of
The two local oscillators 180a and 180b may produce different local oscillator frequencies Flo1 and Flo2 compatible with the different RF power generator frequencies F1 and F2, respectively.
In an alternative embodiment, each phase comparator 194a and 194b may be modified in accordance with
The user interface 215 provides two user-selected phase angles, namely a first phase angle Δθ1U representing the desired or user-selected phase difference between the upper and lower probes at the frequency of the first pair of RF power amplifiers 140a, 150a, and a second phase angle Δθ2U representing the desired or user-selected phase difference between the upper and lower probes at the frequency of the second pair of RF power amplifiers 140b, 150b. The user interface 215 is synchronized with the multiplexer 420 so as to send each of the two user-selected phase differences Δθ1U and Δθ2U to the feedback controller 210 during alternate time division multiplexing windows.
The feedback controller 210 produces a first corrective signal in accordance with the difference between Δθ1M and Δθ1U during alternate time division multiplexing windows. During the remaining time division multiplexing windows, the feedback controller 210 produces a second corrective signal in accordance with the difference between Δθ2M and &BzΔθ2U. A demultiplexer 425 directs the first corrective signal to a control input 152c of a first phase shifter 152 during a first time division multiplexing window, and directs the second corrective signal to a control input 153c of a second phase shifter 153 during a second time division multiplexing window. The sequence is repeated over successive time windows. Respective integrators 230a and 230 may be provided at the inputs to the respective phase shifters 152 and 153. Each integrator 230a and 230b operates in the manner described above with reference to the integrator 230 of
The first phase shifter 152 controls the phase difference between the first pair of RF power amplifiers 140a and 150a. The second phase shifter 153 controls the phase difference between the second pair of RF power amplifiers 140b and 150b. Each phase shifter 152 and 153 may operate, for example, in the manner of the phase shifter 151 of
One advantage of the multiplexer 420 and the demultiplexer 425 is that a single feedback controller 210 controls the phase relationship for both RF frequencies F1 and F2.
Components of the foregoing embodiments may produce and/or receive signals in analog form. Thus for example, the output of the phase comparator 195 of
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
This application claims the benefit of U.S. Provisional Application Ser. No. 61/638,846, filed Apr. 26, 2012 entitled TWO-PHASE OPERATION OF PLASMA CHAMBER BY PHASE LOCKED LOOP, by Satoru Kobayashi, et al.
Number | Date | Country | |
---|---|---|---|
61638846 | Apr 2012 | US |