Claims
- 1. A process for the preparation of a multilayer conductive circuit which comprises connected electrically conductive patterns on at least two inert substrates with a dielectric layer between each pair of substrates, the improvement comprising (a) applying over each conductive substrate in the form of a layer with connector hole openings a particulate prolonged tack toner comprising organic polymer, solid plasticizer and particles of glass dielectric material, and optionally containing inorganic particles, (b) heating the layer containing prolonged tack toner to a temperature sufficient to activate the toner by rendering the toner tacky, (c) reducing the temperature of the layer below the activating temperature of the prolonged tack toner wherein the activated prolonged tack toner remains tacky, (d) repeating steps (a) to (c) at least one time, and (e) firing the dielectric layer to a temperature sufficient to form a smooth layer.
- 2. A process according to claim 1 wherein the glass dielectric is of the vitreous type.
- 3. A process according to claim 1 wherein the glass dielectric is of the crystallizable type.
- 4. A process according to claim 1 wherein titanium dioxide inorganic particles are present.
- 5. A process according to claim 1 wherein barium titanate inorganic particles are present.
- 6. A process according to claim 1 wherein alumina inorganic particles are present.
Parent Case Info
This is a division of application Ser. No. 124,607 filed Feb. 25, 1980, now U.S. Pat. No. 4,303,698.
US Referenced Citations (8)
Non-Patent Literature Citations (1)
Entry |
Naguib et al., "A New Process for Printing Fine Conductor Lines and Spacings on Large Area Substrates", Nov. 1979, pp. 49-57. |
Divisions (1)
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Number |
Date |
Country |
Parent |
124607 |
Feb 1980 |
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