Claims
- 1. A wafer holder for a semiconductor manufacturing apparatus comprising:
a sintered ceramic piece; a conductive layer formed on one surface or both surfaces of said sintered ceramic piece; and a protective layer formed on said sintered ceramic piece to cover a surface of said conductive layer.
- 2. The wafer holder for a semiconductor manufacturing apparatus according to claim 1, wherein
said protective layer contains glass.
- 3. The wafer holder for a semiconductor manufacturing apparatus according to claim 2, wherein
said protective layer contains glass having a thermal expansion coefficient in the range of 3.0×10−6/° C. to 8.0×10−6/° C.
- 4. The wafer holder for a semiconductor manufacturing apparatus according to claim 1, wherein
said protective layer includes oxide containing ytterbium, neodymium and calcium or includes a compound which generates oxide containing ytterbium, neodymium and calcium by being heated.
- 5. The wafer holder for a semiconductor manufacturing apparatus according to claim 1, wherein
said protective layer includes oxide containing yttrium and aluminum or includes a compound which generates oxide containing yttrium and aluminum by being heated.
- 6. The wafer holder for a semiconductor manufacturing apparatus according to claim 1, wherein
said protective layer contains nonoxide ceramic.
- 7. The wafer holder for a semiconductor manufacturing apparatus according to claim 6, wherein
said nonoxide ceramic has a thermal expansion coefficient in the range of 3.0×10−6/° C. to 6.0×10−6/° C.
- 8. The wafer holder for a semiconductor manufacturing apparatus according to claim 6, wherein
said nonoxide ceramic contains at least 50% by mass of either aluminum nitride or silicon nitride.
- 9. A method of manufacturing a wafer holder for a semiconductor manufacturing apparatus comprising the steps of:
applying paste containing metal particles onto one surface or both surfaces of a sintered ceramic piece and firing the paste to form a conductive layer; and forming a protective layer on said sintered ceramic piece to cover a surface of said conductive layer.
- 10. The method of manufacturing the wafer holder for a semiconductor manufacturing apparatus according to claim 9, wherein
said step of forming said protective layer includes providing a layer containing glass and heating them.
- 11. The method of manufacturing the wafer holder for a semiconductor manufacturing apparatus according to claim 10, wherein
said layer containing glass has a thermal expansion coefficient in the range of 3.0×10−6/° C. to 8.0×10−6/° C.
- 12. The method of manufacturing the wafer holder for a semiconductor manufacturing apparatus according to claim 9, wherein
said protective layer includes oxide containing ytterbium, neodymium and calcium or includes a compound which generates oxide containing ytterbium, neodymium and calcium by being heated.
- 13. The method of manufacturing the wafer holder for a semiconductor manufacturing apparatus according to claim 9, wherein
said protective layer includes oxide containing yttrium and aluminum or includes a compound which generates oxide containing yttrium and aluminum by being heated.
- 14. The method of manufacturing the wafer holder for a semiconductor manufacturing apparatus according to claim 9, wherein
said step of forming said protective layer includes providing a layer containing nonoxide ceramic and heating them.
- 15. The method of manufacturing the wafer holder for a semiconductor manufacturing apparatus according to claim 14, wherein
said nonoxide ceramic has a thermal expansion coefficient in the range of 3.0×10−6/° C. to 6.0×10−6/° C.
- 16. The method of manufacturing the wafer holder for a semiconductor manufacturing apparatus according to claim 14, wherein
said nonoxide ceramic contains at least 50% by mass of either aluminum nitride or silicon nitride.
Priority Claims (3)
Number |
Date |
Country |
Kind |
2000-012061(P) |
Jan 2000 |
JP |
|
2000-160721(P) |
May 2000 |
JP |
|
2000-200860(P) |
Jul 2000 |
JP |
|
CROSS-REFERENCE TO RELATED APPLICATION
[0001] The present application is a Divisional Application of our copending U.S. patent application Ser. No. 09/741,477, filed on Dec. 19, 2000.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09741477 |
Dec 2000 |
US |
Child |
10309402 |
Dec 2002 |
US |