WIRED CIRCUIT BOARD

Information

  • Patent Application
  • 20220071002
  • Publication Number
    20220071002
  • Date Filed
    August 24, 2021
    3 years ago
  • Date Published
    March 03, 2022
    2 years ago
Abstract
A wired circuit board includes a base insulating layer, and a circuit disposed on a one-side surface in the thickness direction of the base insulating layer. The circuit includes a transmitting and receiving circuit and a component mounting circuit. The transmitting and receiving circuit includes a first wire. The first wire includes a first aspect ratio R1. The component mounting circuit includes a second wire electrically connected to the first wire. The second wire has a second aspect ratio R2 lower than the first aspect ratio R1.
Description

The present application claims priority from Japanese Patent Application No 2020-145414 filed on Aug. 31, 2020, the contents of which are hereby incorporated by reference into tins application.


TECHNICAL FIELD

The present invention relates to a wired circuit board.


BACKGROUND ART

The wired circuit board includes an insulating layer, and a circuit disposed on the one-side surface in the thickness direction of the insulating layer.


For example, there is a proposed flat coil element including an insulating base film find a conductive pattern disposed on the principal surface of the insulating base film (for example, see Patent Document 1 cited below). In Patent Document 1, the aspect ratio of the conductive pattern is set to 0.5 or more and 5 or less, thereby downsizing the fiat coil element. The conductive pattern has a spiral portion find an external drawing portion connected to the outermost end of the spiral portion.


CITATION LIST
Patent Document

Patent Document 1: international Patent Application Publication No. WO2016/147993


SUMMARY OF THE INVENTION
Problem to be Solved by the Invention

However, the region including the external drawing portion is sometimes bent. When the external drawing portion has the same aspect ratio as that of the spiral portion, there is a disadvantage that the above-described region has low crease performance. The aspect ratio is the ratio of the thickness to the width.


The present invention provides a wired circuit board including a component mounting circuit portion having excellent crease performance, and a transmitting and receiving circuit having excellent transmitting and receiving properties and a small size.


Means for Solving the Problem

The present invention [1] includes a wired circuit board comprising: an insulating layer, and a circuit disposed on a one-side surface in a thickness direction of the insulating layer, wherein the circuit includes a transmitting and receiving circuit, and a component mounting circuit electrically connected to the transmitting and receiving circuit, the transmitting and receiving circuit includes a first wire, the first wire has a first aspect ratio that is a ratio of a thickness to a width, the component mounting circuit includes a second wire electrically connected to the first wire, and the second wire has a second aspect ratio lower than the first aspect ratio.


In the wired circuit board, the second wire has the second aspect ratio lower than the first aspect ratio. Thus, the component mounting circuit portion has excellent crease performance. Meanwhile, the transmitting and receiving circuit portion has excellent transmitting and receiving properties and a small size.


The present invention [2] includes the wired circuit board described in [1] above, wherein an upper limit of a ratio of the second aspect ratio to the first aspect ratio is 0.9.


In the wired circuit board, the component mounting circuit portion has even more excellent crease performance, and a transmitting and receiving circuit portion has even more excellent transmitting and receiving properties and an even smaller size.


The present invention [3] includes the wired circuit board described in [1] or [2] above, wherein a lower limit of the first aspect ratio is 0.33, and an upper limit of the second aspect ratio is 0.25.


In the wired circuit board, the lower limit of the first aspect ratio is 0.33. Thus, the transmitting and receiving circuit portion has even more excellent transmitting and receiving properties and an even smaller size. Meanwhile, in the wired circuit board, the upper limit of the second aspect ratio is 0.25. Thus, more excellent crease performance is achieved.


Effects of the Invention

In the wired circuit board, the component mounting circuit portion has excellent crease performance. Meanwhile, the transmitting and receiving circuit portion has excellent transmitting and receiving properties and a small size.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1A and FIG. 1B illustrate a first embodiment of the wired circuit board of the present invention. FIG. 1A is a plan view thereof. FIG. 1B is a cross-sectional view taken along line X-X of FIG. 1A.



FIG. 2A to FIG. 2D illustrate the steps of producing the wired circuit board depicted in FIG. 1B. FIG. 2A illustrates a step of preparing a base insulating layer. FIG. 2B illustrates a step of forming a first conductive layer. FIG. 2C illustrates a step of forming a second conductive layer FIG. 2D illustrates a step of forming a cover insulating layer.



FIG. 3A and FIG. 3B illustrate a variation of the first embodiment. FIG. 3A is a plan view thereof FIG. 3B is a cross-sectional view taken along line X-X of FIG. 1A.



FIG. 4A to FIG. 4C illustrate the second embodiment of the wired circuit board of the present invention. FIG. 4A is a plan view thereof. FIG. 4B is a plan view of the second circuit. FIG. 4C is a cross-sectional view taken along line X-X of FIG. 4A and FIG. 4B.



FIG. 5A to FIG. 5C illustrate a variation of the second embodiment. FIG. 5A is a plan view thereof. FIG. 5B is a plan view of the second circuit. FIG. 5C is a cross-sectional view taken along line X-X of FIG. 5A and FIG. 5B.



FIG. 6A to FIG. 6C illustrate the third embodiment of the wired circuit board of the present invention. FIG. 6A is a plan view thereof. FIG. 6B is a plan view of a second circuit. FIG. 6C is a cross-sectional view taken along line X-X of FIG. 6A and FIG. 6B.



FIG. 7A to FIG. 7C illustrate a variation of the third embodiment. FIG. 7A is a plan view thereof. FIG. 7B is a plan view of a second circuit. FIG. 7C is a cross-sectional view taken along line X-X of FIG. 7A and FIG. 7B.



FIG. 8A to FIG. 8C illustrate another variation of the third embodiment. FIG. 8A is a plan view thereof. FIG. 8B is a plan view of a second circuit. FIG. 8C is a cross-sectional view taken along line X-X of FIG. 8A and FIG. 8B.





DESCRIPTION OF THE EMBODIMENTS
First Embodiment

The first embodiment of the wired circuit board of the present invention will be described with reference to FIG. 1A and FIG. 1B. To clarity the position and shape of a circuit 3 (described below ), a cover insulating laser 4 (described below) is omitted in FIG. 1A.


A wired circuit board 1 of the first embodiment has a sheet shape. The wired circuit board 1 extends in a first direction. The first direction is orthogonal to a thickness direction. The wired circuit board 1 includes a transmitting and receiving portion 31 and a component mounting portion 32.


The transmitting and receiving portion 31 is a region that receives fin outside signal and/or transmits a signal to the outside. The transmitting and receiving portion 31 is disposed at a one-side end in the first direction of the wired circuit board 1.


The component mounting portion 32 is a region on which a mounted component 35 (phantom line) described below is mounted. The component mounting portion 32 is disposed at the other side in the first direction of the transmitting and receiving portion 31. The component mounting portion 32 continues to the transmitting and receiving portion 31.


The wired circuit board 1 includes a base insulating layer 2, the circuit 3, and the cover insulating layer 4. Preferably, the wired circuit board 1 includes only the base insulating layer 2, circuit 3, and cover insulating layer 4.


The base insulating layer 2 is an example of the insulating layer. The base insulating layer 2 forms the other-side surface in the thickness direction of the wired circuit board 1. The base insulating layer 2 has the same shape as that of the wired circuit board 1 in the plan view. The base insulating layer 2 extends over the transmitting and receiving portion 31 and the component mounting portion 32. The thickness of the base insulating layer 2 is not especially limited The lower limit of the thickness of the base insulating layer 2 is, for example, 1 μm, preferably, 3 μm. The upper limit of the thickness of the base insulating layer 2 is, for example, 200 μm, preferably, 150 μm. The material of the base insulating layer 2 is, for example, resin. Examples of the resin include polyimide.


The circuit 3 is disposed at one side in the thickness direction of the base insulating layer 2. Specifically, the circuit 3 is in contact with a one-side surface in the thickness direction of the base insulating layer 2. The circuit 3 extends over the transmitting and receiving portion 31 and the component mounting portion 32. The circuit 3 includes a transmitting and receiving circuit 5 and a component mounting circuit 6.


The transmitting and receiving circuit 5 receives an outside signal and/or transmits a signal to the outside. The signal includes, for example, electricity and electrical waves. Specifically, examples of the transmitting and receiving circuit 5 include antennas and coils. The transmitting and receiving circuit 5 is included in the transmitting and receiving portion 31. The transmitting and receiving circuit 5 includes a first wire 7. Preferably, the transmitting and receiving circuit 5 includes only the first wire 7.


In the plan view, the first wire 7 has an approximately C shape opening toward the other side in the first direction. Specifically, the first wire 7 has a loop shape with a cut part. Thus, the transmitting and receiving circuit 5 is sometimes called as a loop antenna.


As long as satisfying a first aspect ratio R1 described below, a width W1 of the first wire 7 is not especially limited. The width W1 of the first wire 7 is a length in a direction orthogonal to a direction in which the first wire 7 extends and the thickness direction. The lower limit of the width W1 of the first wire 7 is, for example, 10 μm, preferably 20 μm.


The upper limit of the width W1 of the first wire 7 is, for example, 500 μm, preferably 300 μm.


As long as satisfying the first aspect ratio R1 described below, a thickness T1 of the first wire 7 is not especially limited. The thickness T1 of the first wire 7 is a distance between the one-side surface in the thickness direction of the base insulating layer 2 and a one-side surface in the thickness direction of the first wire 7. The thickness T1 of the first wire 7 is the same as a thickness of the transmitting and receiving circuit 5. The lower limit of the thickness T1 of the first wire 7 is, for example, 5 μm, preferably 8 μm, more preferably 10 μm. The upper limit of the thickness T1 of the first wire 7 is, for example, 50 μm.


The first aspect ratio R1 of the first wire 7 is a ratio (T1/W1) of the thickness T1 of the first wire 7 to the width W1 of the first wire 7. As long as being higher than a second aspect ratio R2 of a second wire 8 described below, the first aspect ratio R1 of the first wire 7 is not especially limited. Specifically, the lower limit of the first aspect ratio R1 of the first wire 7 is, for example, 0.33, preferably 0.5, more preferably 1, even more preferably 2. When the first aspect ratio R1 of the first wire 7 is the above-described lower limit or more, the transmitting and receiving circuit 5 has excellent transmitting and receiving properties and a small size. The upper limit of the first aspect ratio R1 of the first wire 7 is not especially limited. The upper limit of the first aspect ratio R1 of the first wire 7 is, for example, 1000 and, for example, 500.


The component mounting circuit 6 inputs the signal transmitted from the transmitting and receiving circuit 5 into the mounted component 35 (phantom line), and/or, transmits the signal output from the mounted component 35 (phantom line) to the transmitting and receiving circuit 5. The component mounting circuit 6 is included in the component mounting portion 32. Specifically, the component mounting circuit 6 includes the second wires 8 and terminals 9.


The second wires 8 extend in the first direction. A plurality (two) of the second wires 8 is provided in a second direction, separating from each other with a space therebetween. The second direction is orthogonal to the first direction and the thickness direction. The second wires 8 continue to two ends of the first wire 7, respectively.


As long as satisfying the second aspect ratio R2 described below, a width W2 of each of the second wires 8 is not especially limited. The lower limit of the width W2 of the second wire 8 is, for example, 20 μm, preferably 50 μm. The upper limit of the width W2 of the second wire 8 is, for example, 1000 μm, preferably 500 μm.


As long as satisfying the second aspect ratio R2 described below, a thickness T2 of each of the second wires 8 is not especially limited. The thickness T2 of the second wire 8 is a distance of the one-side surface in the thickness direction of the base insulating layer 2 and a one-side surface in the thickness direction of the second wire 8. The lower limit of the thickness T2 of the second wire 8 is, for example, 3 μm, preferably 5 μm. The upper limit of the thickness T2 of the second wire 8 is, for example, 15 μm, preferably 10 μm.


As long as being tower than the above-described first aspect ratio R1, the second aspect ratio R2 is not especially limited. The second aspect ratio R2 of each of the second wires 8 is a ratio (T2/W2) of the thickness T2 of the second wire 8 to the width W2 of the second wire 8. The upper limit of the second aspect ratio R2 of the second wire 8 is, for example, 0.25, preferably 0.20, more preferably 0.10. When the second aspect ratio R2 of the second wire 8 is less than or equal to the above-described upper limit, the component mounting portion 32 has excellent crease performance. The lower limit of the second aspect ratio R2 of the second wire 8 is not especially limited. The lower limit of the second aspect ratio R2 of the second wire 8 is, for example, 0.01, preferably 0.05.


Further, the second aspect ratio R2 of the second wire 8 is lower than the first aspect ratio R1 of the first wire 7. In short, the R1 and R2 satisfy the following expression (1).





R2<R1  (1)


On the other hand, when the second aspect ratio R2 of the second wire 8 is more than or equal to the first aspect ratio R1 of the first wire 7, the component mounting portion 32 has low crease performance, and the transmitting and receiving portion 31 cannot have a small size. The “small size” means that the transmitting and receiving portion 31 can be downsized in the plan view.


The upper limit of a ratio R3 (=R2/R1) of the second aspect ratio R2 to the first aspect ratio R1 is, for example, 0.9, preferably 0.8, more preferably 0.75, even more preferably 0.5. When the above-described ratio R3 is lower than or equal to the above-described upper limit, the component mounting portion 32 has more excellent crease performance, and the transmitting and receiving portion 31 can more surely have a small size. The lower limit of the ratio R3 of the second aspect ratio R2 to the first aspect ratio R1 is not especially limited. The lower limit of the above-described ratio R3 is, for example, 0.03.


The upper limit of a difference D (=R1−R2) obtained by subtracting the second aspect ratio R2 from the first aspect ratio R1 is, for example, 0.5, preferably 0.3, more preferably 0.25, even more preferably 0.2. When the above-described difference D is lower than or equal to the above-described upper limit, the component mounting portion 32 has more excellent crease performance, and the component mounting portion 32 can more surely have a small size. The lower limit of the difference D is not especially limited The lower limit of the difference D is, for example, 0.08.


The terminals 9 are disposed on the one-side surface in the thickness direction of the base insulating layer 2 in the transmitting and receiving portion 31. The terminals 9 continue to one of the plurality of the second wires 8. The terminals 9 intervene in the middle of one of the second wires 8. The two terminals 9 are disposed in the first direction, separating from each other with a space therebetween. Each of the two terminals 9 has an approximately rectangular land pattern shape. The terminals 9 are exposed at the one side in the thickness direction. The size and area of each of the terminals 9 is not limited. The terminal 9 has, for example, the same thickness as that of the thickness T2 of the second wire 8.


Examples of the material of the circuit 3 include metals. Examples of the metals include copper, silver, gold, and solder. As the metal, preferably, copper is used.


As illustrated in FIG. 1B, the cover insulating layer 4 is disposed at the one side in the thickness direction of the base insulating layer 2. The cover insulating layer 4 extends over the transmitting and receiving portion 31 and the component mounting portion 32. The cover insulating layer 4 covers the first wire 7 and the second wires 8. The cover insulating layer 4 exposes the terminals 9. Examples of the material of the cover insulating layer 4 include resins. As the resin, for example, polyimide is used. The thickness of the cover insulating layer 4 is not especially limited.


An exemplary method of producing the wired circuit board 1 will be described. FIG. 2A to FIG. 2D will be referred to.


As illustrated in FIG. 2A, in the method, the base insulating layer 2 is prepared.


As illustrated in FIG. 2B and FIG. 2C, in the method, the circuit 3 is subsequently formed on the one-side surface in the thickness direction of the base insulating layer 2. For example, the circuit 3 is formed by an additive method. Specifically, as illustrated in FIG. 2B, the first conductive layer 11 is formed first. Subsequently, as illustrated in FIG. 2C, the second conductive layer 12 is formed.


As illustrated in FIG. 2B, in the plan view, the first conductive layer 11 has the same shape as those of the above-described transmitting and receiving circuit 5 and component mounting circuit 6. Meanwhile, as illustrated in FIG. 2C, the second conductive layer 12 has the same shape as that of the above-described transmitting and receiving circuit 5. In other words, the transmitting and receiving circuit 5 includes the first conductive layer 11 and the second conductive layer 12 toward the one side in the thickness direction. On the other hand, the component mounting circuit 6 does not include the second conductive layer 12 and includes only the first conductive layer 11.


Before the first conductive layer 11 is formed, if necessary, a metal underlying layer (not illustrated) is disposed on the one-side surface in the thickness direction of the base insulating layer 2.


Subsequently, a first plated resist 25 is disposed on the one-side surface in the thickness direction of the metal underlying layer (or the base insulating layer 2). The first plated resist 25 has a reverse pattern to those of the transmitting and receiving circuit 5 and component mounting circuit 6. In other words, the first plated resist 25 has a first plated opening portion 29 corresponding to the transmitting and receiving circuit 5 and component mounting circuit 6.


Thereafter, by plating, the first conductive laser 11 is formed m the first plated opening portion 29. Examples of the plating include electrolytic plating and non-electrolytic plating. As the plating, preferably, electrolytic plating is used.


Thereafter, a second plated resist 26 is disposed on the first conductive layer 11 on the component mounting circuit 6. The second plated resist 26 include a second plated opening portion 30 corresponding to the transmitting and receiving circuit 5.


Thereafter, by plating, the second conductive layer 12 is formed in the second plated opening portion 30. Examples of the plating include electrolytic plating and non-electrolytic plating. As the plating, preferably, electrolytic plating is used.


In this manner, the circuit 3 including the first conductive layer 11 and the second conductive layer 12 is formed.


Thereafter, the first plated resist 25 and the second plated resist 26 are removed. Subsequently, the metal underlying layer corresponding to the first plated resist 25 is removed.


Thereafter, as illustrated in FIG. 2D, the cover insulating layer 4 is formed. For example, varnish including photosensitive resin is applied to the base insulating layer 2 and the circuit 3, thereby forming a photosensitive application film. Thereafter, by a photolithographic method, the cover insulating layer 4 is formed from the photosensitive application film.


In this manner, the wired circuit board 1 including the base insulating layer 2, the circuit 3, and the cover insulating layer 4.


As illustrated in FIG. 1A and FIG. 1B, thereafter, the terminals 9 of the circuit 3 are electrically connected to the mounted component 35 (phantom line). The mounted component 35 is mounted on the component mounting portion 32. The mounted component 35 includes two electrodes 36 (phantom line). The two electrodes 36 are in contact with the two terminals 9, respectively.


Although not illustrated, while the wired circuit board 1 is used, the component mounting portion 32 can be bent.


Operations and Effects of the First Embodiment

Further, in the wired circuit board 1, the second wires 8 each have a second aspect ratio R2 lower than the first aspect ratio R1 of the first wire 7. Thus, the component mounting portion 32 has excellent crease performance. In other words, when the component mounting portion 32 is bent while the wired circuit board 1 is used, the damage to the component mounting portion 32 is suppressed.


Meanwhile, the transmitting and receiving portion 31 has excellent transmitting and receiving properties and a small size.


Furthermore, in the wired circuit board 1, when the upper limit of the ratio 3 (=R2/R1) of the second aspect ratio R2 to the first aspect ratio R1 is 0.9, the component mounting portion 32 has more excellent crease performance, and the transmitting and receiving portion 31 can surely have a small size.


Furthermore, in the wired circuit board 1, when the lower limit of the first aspect ratio R1 of the first wire 7 is 0.33, the transmitting and receiving circuit 5 has excellent transmitting and receiving properties and a small size.


Furthermore, in the wired circuit board 1, when the upper limit of the second aspect ratio R2 of the second wire 8 is 0.25, the component mounting portion 32 has excellent crease performance.


Variation of the First Embodiment

In a variation, the same members and steps as in the first embodiment will be given the same numerical references and the detailed description thereof will be omitted. Further, the variation has the same operations and effects as those of the first embodiment unless especially described otherwise. Furthermore, the first embodiment and the variation can appropriately be combined.


Although not illustrated, alternatively, after the first conductive layer 11 having the same shape as that of the transmitting and receiving circuit 5 is first formed, the second conductive layer 12 having the same shape as that of the component mounting circuit 6 can be formed. In the variation, the transmitting and receiving circuit 5 is, for example, a single layer.


Although not illustrated, alternatively, the circuit 3 can be formed by a subtractive method.


The shape of the transmitting raid receiving circuit 5 is not especially limited. The transmitting and receiving circuit 5 mas have a spiral shape. The spiral shape is shown in FIG. 4A, FIG. 6A, and FIG. 8A.


As illustrated in FIG. 3A and FIG. 3B, in the variation, the first wire 7 has an approximately straight line shape in the plan view. The transmitting and receiving circuit 5 including the above-described first wire 7 can be called as a dipole antenna. The first wire 7 extends along the second direction. Specifically, the first wire 7 extends from an end in the first direction of the second wire 8 toward the outside in the second direction. In this manner, the first wire 7 and the second wire 8 form an approximately L shape in the plan view.


Each of the two second wires 8 in the component mounting circuit 6 is provided with the two terminals 9. For each one of the second wires 8, the two terminals 9 are provided.


Second Embodiment

In the second embodiment, the same members and steps as in the first embodiment will be given the same numerical references and the detailed description thereof will be omitted. Further, the second embodiment has the same operations and effects as those of the first embodiment unless especially described otherwise. Furthermore, the first embodiment and the second embodiment can appropriately be combined.


The second embodiment of the wired circuit board of the present invention will be described with reference to FIG. 4A to FIG. 4C. In FIG. 4B, to clarify the positions and shapes of a second circuit 14 (described below) and a connecting portion 15 (described below), a base insulating layer 2 is illustrated with a phantom line, and a circuit 3 is omitted.


A wired circuit board 1 further includes the second circuit 14 and the connecting portion 15.


The second circuit 14 is disposed on the other side in the thickness direction of a base insulating layer 2. The second circuit 14 is in contact with the other-side surface in the thickness direction of the base insulating layer 2. The second circuit 14 has, for example, an approximately L shape in the plan view. Examples of the material of the second circuit 14 include metals. Examples of the metals include stainless steels, copper alloys, irons, and, coppers. As the metal, preferably, a stainless steel is used. The size and thickness of the second circuit 14 is not especially limited.


The connecting portion 15 electrically connects the circuit 3 and the second circuit 14. In the plan view, the connecting portion 15 is disposed on a one-side surface in the thickness direction of each of two ends of the second circuit 14. One of the two connecting portions 15 is integrated with an end in a first direction of the second wire 8. The second wire 8 is the one of the two second wires 8 in which the terminals 9 do not intervene. The other one of the two connecting portions 15 is integrated with an end of the first wire 7. The material of the connecting portion 15 is, for example, the same metal as the circuit 3. The circuit 3 has the same thickness as that of the base insulating layer 2.


In the second embodiment, the first wire 7 has a spiral shape. An internal end of the first wire 7 continues to the above-described connecting portion 15. An external end of the first wire 7 continues to the second wire 8 in which the terminals 9 intervene.


In the wired circuit board 1 of the second embodiment, an electrical path is formed from the second wire 8 in which the terminals 9 intervene, through the first wire 7 and the second circuit 14, to the second wire 8 in which the terminals 9 do not intervene.


Variation of the Second Embodiment

In a variation, the same members and steps as in the second embodiment will be given the same numerical references and the detailed description thereof will be omitted. Further, the variation has the same operations and effects as those of the second embodiment unless especially described otherwise. Furthermore, the second embodiment and live variation can appropriately be combined.


The variation of the second embodiment will be described with reference to FIG. 5A to FIG. 5C. In FIG. 5B, to clarify the positions and shapes of a second circuit 14 (described below ) and a connecting portion 15 (described below), a base insulating layer 2 is illustrated with a phantom line, and a circuit 3 is omitted.


As illustrated in FIG. 5A, a transmitting and receiving circuit 5 includes a first conductive board 39. The first conductive board 39 has an approximately rectangular shape extending in a first direction and a second direction. The first conductive board 39 has a flat plate shape. The transmitting and receiving circuit 5 can be called as a microstrip antenna.


The second circuit 14 includes a second conductive board 40. The second conductive board 40 has a rectangular shape extending in the first direction and the second direction. The second conductive board 40 has a flat plate shape. At each of an end and center part of the second conductive board 40, the connecting portion 15 is provided.


Third Embodiment

In the third embodiment, the same members and steps as in the first embodiment and the second embodiment will be given the same numerical references and the detailed description thereof will be omitted. Further, the third embodiment has the same operations and effects as those of the first embodiment and the second embodiment unless especially described otherwise. Furthermore, the first to third embodiments can appropriately be combined.


The third embodiment of the wired circuit board of the present invention will be described with reference to FIG. 6A to FIG. 6C. In FIG. 6B, to clarify the positions and shapes of a second circuit 14 (described below) and a connecting portion 15 (described below), a base insulating layer 2 is illustrated with a phantom line, and a circuit 3 is omitted.


A wired circuit board 1 further includes a second base insulating layer 20. Specifically, the wired circuit board 1 includes the base insulating layer 2, the second circuit 14, the connecting portion 15, the second base insulating layer 20, the circuit 3, and a cover insulating layer 4.


In the wired circuit board 1, the second circuit 14 is disposed on a one side in the thickness direction of the base insulating layer 2. The second circuit 14 includes a second transmitting and receiving circuit 23 and a linear circuit 24.


The second transmitting and receiving circuit 23 includes a third wire 43. The third wire 43 has an approximately spiral shape in the plan view. The third wire 43 has the same first aspect ratio R1 as that of the first wire 7 of the first embodiment.


The linear circuit 24 includes a fourth wire 44 extending in the first direction. The fourth wire 44 continues to an external end of the second transmitting and receiving circuit 23. The fourth wire 44 has the same second aspect ratio R2 as that of the second wire 8 of the first embodiment.


The connecting portion 15 is disposed on a one-side surface in the thickness direction at an internal end of the second transmitting and receiving circuit 23.


The second base insulating layer 20 is also an example of the insulating layer. The second base insulating layer 20 is disposed on a one-side surface in the thickness direction of the base insulating layer 2. The second base insulating layer 20 covers the second circuit 14. The second base insulating layer 20 has a base penetrating hole 22. The base penetrating hole 22 penetrates the second base insulating layer 20 in the thickness direction. The base penetrating hole 22 is filled with the connecting portion 15.


The circuit 3 is disposed on a one-side surface in the thickness direction of the second base insulating layer 20. The circuit 3 includes a transmitting and receiving circuit 5 and a component mounting circuit 6. The transmitting and receiving circuit 5 has an approximately spiral shape in the plan view. An internal end of the transmitting and receiving circuit 5 is integrated with the connecting portion 15. The component mounting circuit 6 includes one second wire 8 and two terminals 9.


The cover insulating layer 4 is disposed on the one side in the thickness direction of the second base insulating layer 20. The cover insulating layer 4 covers the circuit 3.


In the wired circuit board 1 of the third embodiment, the component mounting circuit 6, the transmitting and receiving circuit 5, and the second circuit 14 are electrically connected.


Specifically, an electrical path is formed from the component mounting circuit 6 though the transmitting and receiving circuit 5 and second transmitting and receiving circuit 23 to a linear circuit 24.


Variations of the Third Embodiment

In the following variations, the same members and steps as in the third embodiment will be given the same numerical references and the detailed description thereof will be omitted. Further, each of the variations has the same operations and effects as those of the third embodiment unless especially described otherwise. Furthermore, the third embodiment and the variations can appropriately be combined.


A variation of the third embodiment will be described with reference to FIG. 7A to FIG. 7C. In FIG. 7B, to clarify the positions and shapes of a second circuit 14 (described below) and a connecting portion 15 (described below), a base insulating layer 2 is illustrated with a phantom line, and a circuit 3 is omitted.


As illustrated in FIG. 7A to FIG. 7C, in the variation, a first wire 7 is disposed and formed into a patch shape. Thus, the transmitting and receiving circuit 5 can be called as a patch array antenna.


The second circuit 14 extends in a first direction. The second circuit 14 includes a second striation circuit 28 and the linear circuit 24. The second striation circuit 28 has the same first aspect ratio R1 as that of the second transmitting and receiving circuit 23. The linear circuit 24 has the same second aspect ratio R2 as that of the linear circuit 24 of the third embodiment.


As illustrated in FIG. 8A to FIG. 8C, in another variation, a second base insulating layer 20 is disposed at the other side in the thickness direction of a base insulating layer 2. The second base insulating layer 20 is disposed on the other-side surface in the thickness direction of the base insulating layer 2. The second base insulating layer 20 covers a second circuit 14. The second circuit 14 is disposed at the other-side in the thickness direction of the base insulating layer 2.


While the illustrative embodiments of the present invention are provided in the above description, such is for illustrative purpose only and it is not to be construed as limiting in any manner. Modification and variation of the present invention that will be obvious to those skilled in the art is to be covered by the following claims.


DESCRIPTION OF REFERENCE NUMERALS


1 wired circuit board



2 base insulating layer



3 circuit



5 transmitting and receiving circuit



6 component mounting circuit



7 first wire



8 second wire



14 second circuit



20 second base insulating layer

Claims
  • 1. A wired circuit board comprising: an insulating layer, anda circuit disposed on a one-side surface in a thickness direction of the insulating layer,
  • 2. The wired circuit board according to claim 1, wherein an upper limit of a ratio of the second aspect ratio to the first aspect ratio is 0.9.
  • 3. The wired circuit board according to claim 1, wherein a lower limit of the first aspect ratio is 0.33, and an upper limit of the second aspect ratio is 0.25.
  • 4. The wired circuit board according to claim 2, wherein a lower limit of the first aspect ratio is 0.33, and an upper limit of the second aspect ratio is 0.25.
Priority Claims (1)
Number Date Country Kind
2020-145414 Aug 2020 JP national