This application is based upon and claims the benefit of priority of the prior Japanese Patent Application No. 2017-199347, filed on Oct. 13, 2017, the entire contents of which are incorporated herein by reference.
The embodiments discussed herein are related to a wiring board and a manufacturing method for a wiring board.
The following techniques are known techniques related to a wiring board including a via that couples wiring in one wiring layer to wiring in another wiring layer.
For example, there is known a method of manufacturing a wiring board, including forming a non-penetrating hole in a board including a plurality of wiring layers, disposing a conductive material on a bottom portion of the non-penetrating hole, inserting a thin conductive wire into the non-penetrating hole and joining the thin conductive wire with the conductive material, and filling the gap between the thin conductive wire and the side wall surface of the non-penetrating hole with an insulating material.
There is also known a technique for achieving impedance matching of a board by inserting, into a hole in a multilayered board, a component including a dielectric layer encasing a conductive ground core and a signal conductive layer coupled lateral to the dielectric layer.
There is also known a printed board structure including a via through-hole portion having a center conductor that connects a front-surface pattern and a back-surface pattern of a multilayered printed board, a covering conductor disposed around the center conductor, and an insulating material disposed between the center conductor and the covering conductor.
Related arts are disclosed in Japanese Laid-open Patent Publication Nos. 2015-128100 and 2006-191018, and Japanese Unexamined Utility Model Registration Application Publication No. 4-97380.
According to an aspect of the embodiments, a wiring board includes, a multilayer substrate including a plurality of wiring layers, a plurality of insulating layers, a via hole extending through a subset of the plurality of wiring layers and the plurality of insulating layers, and a screw via embedded in the via hole. The screw via includes a tip portion coupled to first wiring provided in any of the plurality of wiring layers, a core wire having a first end coupled to the tip portion, a head portion coupled to a second end of the core wire and coupled to second wiring located at a surface of the multilayer substrate, and a shank portion formed of an insulator at least on a surface thereof, covering a side surface of the core wire, and having a screw thread on the surface thereof. The tip portion, the core wire and the head portion are formed of a conductor.
The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention.
In a wiring board including a plurality of wiring layers, the wiring layers are coupled using vias.
Part of a via may form a branch of wiring called a stub, and this stub may adversely affect a signal passing through signal wiring. For example, after reaching a point of branch into the stub and the signal wiring, a signal passing through the signal wiring splits into two, with one of them going to the stub, getting reflected by an end portion of the stub, and returning to the branch point. Then, the signal passing through the signal wiring and the signal reflected by the end portion of the stub interfere with each other, causing possible signal attenuation at the branch point.
A known approach to removing a stub is back-drilling. In back-drilling, a drill is inserted from the back surface of a wiring board at the position where a via is formed, thereby cutting and removing the stub. However, with back-drilling, it is difficult to remove a stub completely without cutting the signal wiring, and a stub of approximately 0.5 mm remains. A signal loss by reflection caused by a stub increases as the transmission rate of the signal increases, and even if back-drilling is employed, it is difficult to achieve high transmission of, for example, more than 25 gigabits per second (Gbps). While there are via techniques that do not produce stubs, such as skip vias or stack vias, they only allow fabrication of short vias extending for three wiring layers due to manufacturing limitation.
The following describes embodiments of the disclosed technique as examples with reference to the drawings. Throughout the drawings, the same or equivalent components are denoted by the same reference numerals.
The tip portion 20 is formed of a conductor such as copper, and is disposed at the tip of the screw via 10.
The core wire 30 is formed of a conductor such as copper, and has one end coupled to the tip portion 20. The head portion 40 is formed of a conductor such as copper, and is coupled to the other end of the core wire 30. For example, the head portion 40 is electrically coupled to the tip portion 20 through the core wire 30. As illustrated in
The shank portion 50 covers the side surface of the core wire 30. For example, the core wire 30 is embedded inside the shank portion 50. The shank portion 50 has a screw thread 51 formed on the surface thereof. The shank portion 50 is insulated at least on the surface thereof, and preferably, is as hard as ceramics and is nonmagnetic. For example, Nasseel Insulation Skin (Nasseel IS) may be favorably used as a material for the shank portion 50. Nasseel IS is a member insulated by formation of a ceramic layer on the surface of a stainless-steel part. A resin material such as an epoxy resin may also be used as a material for the shank portion 50 as long as the resin material is as hard as ceramics.
The wiring board 100 includes a plurality of wiring layers L1 to L16 stacked in the thickness direction of the wiring board 100 and a plurality of insulating layers 110 provided between the wiring layers. For example, the wiring layers and the insulating layers 110 are stacked alternately. The number of wiring layers provided in the wiring board 100 may be increased or decreased appropriately. In the present embodiment, the wiring layers L1, L3, L5, L7, L10, L12, L14, and L16 are wiring layers in each of which signal wiring is formed, and the wiring layers L2, L4, L6, L8, L9, L11, L13, and L15 are wiring layers in each of which a ground plane is formed. The wiring layers L1 and L16 are wiring layers disposed at the outermost surfaces of the wiring board 100.
The screw vias 10A and 10B penetrate from the surface of the wiring board 100 through the wiring layers L16 to L6 and the insulating layers 110 provided between the wiring layers L16 to L6, and reach the wiring layer L5. The screw via 10A has the tip portion 20 coupled to signal wiring 130A provided in the wiring layer L5, and the head portion 40 coupled to signal wiring 120A provided in the wiring layer L16. For example, the signal wiring 120A and the signal wiring 130A are electrically coupled through the screw via 10A. Similarly, the screw via 10B has the tip portion 20 coupled to signal wiring 130B provided in the wiring layer L5, and the head portion 40 coupled to signal wiring 120B provided in the wiring layer L16. For example, the signal wiring 120B and the signal wiring 130B are electrically coupled through the screw via 10B. The signal wiring 120A and 130A may be signal wiring through which one of paired differential signals passes, and the signal wiring 120B and 130B may be signal wiring through which the other one of the paired differential signals passes.
The following describes a method of manufacturing the wiring board 100 with reference to
Next, by drilling, via holes 140A and 140B are formed at positions on the board 100a where the screw vias 10A and 10B are to be formed (
Preferably, the via holes 140A and 140B are formed using a drill having a roughened tip.
Next, the screw vias 10A and 10B are inserted into the via holes 140A and 140B, respectively (
Through the above steps, the wiring board 100 is completed. In a later reflow step of soldering a component to the wiring board 100, the tip portions 20 of the screw vias 10A and 10B and the conductors forming the signal wiring 130A and 130B soften, strengthening the joint between the conductors. When the tip portions 20 and the signal wiring 130A and 130B have roughened surfaces, anchor effect is produced, making it possible to enhance the joint strength between the screw via 10A and the signal wiring 130A and the joint strength between the screw via 10B and the signal wiring 130B.
Next, as illustrated in
On the other hand, in the wiring board 100 according to the disclosed technique, no stub is generated since interlayer connection of wiring provided in the wiring layers L1 to L16 is achieved by embedment of the screw vias 10A and 10B into the board 100a. Thus, deterioration in signal transmission quality due to stubs is reduced.
Through simulation, a comparison of signal transmission quality was made using eye diagrams between a wiring board with 0.5-mm stubs and a wiring board without stubs.
In the wiring board 100 according to the embodiment of the disclosed technique, the impedance of the screw vias 10A and 10B is controllable by changing of the relative permittivity and diameter of the shank portion 50, the diameter of the core wire 30, and the like of the screw vias 10A and 10B. Impedance of the screw vias 10A and 10B was calculated with changes made to the values of the diameter a of the core wire 30, the diameter b of the shank portion 50, the interval c between the core wires 30, and the distance d between each core wire 30 and the closest ground via 170, as illustrated in
As the results demonstrate, in the wiring board 100 according to the embodiment of the disclosed technique, the impedance of the screw vias 10A and 10B is readily controllable. When there is impedance mismatch between the screw vias 10A and 10B and the signal wiring 120A, 130A, 120B, and 130B coupled to the screw vias 10A and 10B, signal transmission quality lowers due to reflection. Thus, at least one of the values of a to d is preferably adjusted in order to make small the difference between the impedance of the screw vias 10A and 10B and the impedance of the signal wiring 120A, 130A, 120B, and 130B coupled thereto. This allows reduction in signal reflection due to impedance mismatch and improvement in signal transmission quality.
In the wiring board 100 according to the present embodiment, the tip portions 20 of the screw vias 10A and 10B and the signal wiring 130A, 130B have roughened surfaces, so that the area of contact between the screw via 10A and the signal wiring 130A and between the screw via 10B and the signal wiring 130B are increased. This in turn achieves reduction in the contact resistance between the screw via 10A and the signal wiring 130A and between the screw via 10B and the signal wiring 130B. The anchor effect allows enhancement of the joint strength between the screw via 10A and the signal wiring 130A and between the screw via 10B and the signal wiring 130B.
Although the present embodiment describes an example where the screw vias 10A and 10B are used to connect the signal wiring 120A and 120B provided in the wiring layer L16 to the signal wiring 130A and 130B provided in the wiring layer L5, respectively, the disclosed technique is not limited to such a mode. The screw vias 10A and 10B may be used to connect wiring in any of the wiring layers provided inside the wiring board 100 to wiring in the wiring layer provided at the outermost surface of the wiring board.
Although the present embodiment describes an example where the screw vias 10A and 10B are disposed on transmission paths through which differential signals pass, screw vias may be disposed on transmission paths through which single-ended signals pass.
The wiring board 100 is an example of a wiring board in the disclosed technique. The screw via 10, 10A, 10B, and 10C are an example of a screw via in the disclosed technique. The tip portion 20 is an example of a tip portion in the disclosed technique. The core wire 30 is an example of a core wire in the disclosed technique. The head portion 40 is an example of a head portion in the disclosed technique. The shank portion 50 is an example of a shank portion in the disclosed technique. The wiring layers L1 to L16 are examples of wiring layers in the disclosed technique. The signal wiring 130A and 130B are an example of first wiring in the disclosed technique. The signal wiring 120A and 120B are an example second wiring in the disclosed technique.
All examples and conditional language provided herein are intended for the pedagogical purposes of aiding the reader in understanding the invention and the concepts contributed by the inventor to further the art, and are not to be construed as limitations to such specifically recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although one or more embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
Number | Date | Country | Kind |
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2017-199347 | Oct 2017 | JP | national |