Angelo Pinto

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mixed pitch track pattern
- Patent number 11,929,325
- Issue date Mar 12, 2024
- QUALCOMM Incorporated
- Luca Mattii
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration scheme for changing crystal orientation in hybrid orien...
- Patent number 9,123,570
- Issue date Sep 1, 2015
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...
- Patent number 9,053,966
- Issue date Jun 9, 2015
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,872,220
- Issue date Oct 28, 2014
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduction of STI corner defects during SPE in semiconductor device...
- Patent number 8,846,487
- Issue date Sep 30, 2014
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced CMOS using super steep retrograde wells
- Patent number 8,703,568
- Issue date Apr 22, 2014
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration scheme for changing crystal orientation in hybrid orien...
- Patent number 8,558,318
- Issue date Oct 15, 2013
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,410,519
- Issue date Apr 2, 2013
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Control of dopant diffusion from buried layers in bipolar integrate...
- Patent number 8,247,300
- Issue date Aug 21, 2012
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming integrated circuits with aligned (100) NMOS and...
- Patent number 8,138,035
- Issue date Mar 20, 2012
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Advanced CMOS using super steep retrograde wells
- Patent number 8,129,246
- Issue date Mar 6, 2012
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to eliminate re-crystallization border defects generated dur...
- Patent number 8,043,947
- Issue date Oct 25, 2011
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration scheme for reducing border region morphology in hybrid...
- Patent number 7,943,451
- Issue date May 17, 2011
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration of high-k metal gate stack into direct silicon bonding...
- Patent number 7,943,479
- Issue date May 17, 2011
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of in-situ HCL etch to eliminate by oxidation recrystallization...
- Patent number 7,897,447
- Issue date Mar 1, 2011
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making (100) NMOS and (110) PMOS sidewall surface on the...
- Patent number 7,897,994
- Issue date Mar 1, 2011
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Integration scheme for changing crystal orientation in hybrid orien...
- Patent number 7,892,908
- Issue date Feb 22, 2011
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Border region defect reduction in hybrid orientation technology (HO...
- Patent number 7,855,111
- Issue date Dec 21, 2010
- Texas Instruments Incorporated
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device made by the method of producing hybrid orientn...
- Patent number 7,767,510
- Issue date Aug 3, 2010
- Texas Instruments Incorporated
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced CMOS using super steep retrograde wells
- Patent number 7,655,523
- Issue date Feb 2, 2010
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to improve performance of secondary active components in an...
- Patent number 7,642,197
- Issue date Jan 5, 2010
- Texas Instruments Incorporated
- Periannan Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced CMOS using super steep retrograde wells
- Patent number 7,501,324
- Issue date Mar 10, 2009
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating an epitaxial silicon-germanium layer and an i...
- Patent number 7,217,322
- Issue date May 15, 2007
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Structure of semiconductor device with sinker contact region
- Patent number 7,164,186
- Issue date Jan 16, 2007
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral heterojunction bipolar transistor
- Patent number 6,927,428
- Issue date Aug 9, 2005
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bipolar junction transistor with a counterdoped collector region
- Patent number 6,894,366
- Issue date May 17, 2005
- Texas Instruments Incorporated
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a bipolar junction transistor
- Patent number 6,887,765
- Issue date May 3, 2005
- Texas Instruments Incorporated
- Gregory E. Howard
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor device with sinker contact...
- Patent number 6,806,159
- Issue date Oct 19, 2004
- Texas Instruments Incorporated
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral heterojunction bipolar transistor
- Patent number 6,794,237
- Issue date Sep 21, 2004
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with a collector contact in a depressed well-r...
- Patent number 6,774,455
- Issue date Aug 10, 2004
- Texas Instruments Incorporated
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MIXED PITCH TRACK PATTERN
- Publication number 20230057276
- Publication date Feb 23, 2023
- QUALCOMM Incorporated
- Luca MATTII
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CELL ARCHITECTURE FOR A SEMICONDUCTOR DEVICE
- Publication number 20230022681
- Publication date Jan 26, 2023
- QUALCOMM Incorporated
- Sidharth RASTOGI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIGITAL CURRENT MEASUREMENT FOR IN-SITU DEVICE MONITORING
- Publication number 20190107569
- Publication date Apr 11, 2019
- QUALCOMM Incorporated
- David Kidd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20150014789
- Publication date Jan 15, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20140035057
- Publication date Feb 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATION SCHEME FOR CHANGING CRYSTAL ORIENTATION IN HYBRID ORIEN...
- Publication number 20130292780
- Publication date Nov 7, 2013
- Angelo PINTO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDUCTOR DEVICE...
- Publication number 20130029471
- Publication date Jan 31, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT AND METHOD FOR TESTING INSULATING MATERIAL
- Publication number 20120212245
- Publication date Aug 23, 2012
- QUALCOMM Incorporated
- Angelo Pinto
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20120175710
- Publication date Jul 12, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
ADVANCED CMOS USING SUPER STEEP RETROGRADE WELLS
- Publication number 20120164802
- Publication date Jun 28, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION SCHEME FOR REDUCING BORDER REGION MORPHOLOGY IN HYBRID...
- Publication number 20110180881
- Publication date Jul 28, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...
- Publication number 20110151651
- Publication date Jun 23, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATION SCHEME FOR CHANGING CRYSTAL ORIENTATION IN HYBRID ORIEN...
- Publication number 20110108893
- Publication date May 12, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADVANCED CMOS USING SUPER STEEP RETROGRADE WELLS
- Publication number 20110111553
- Publication date May 12, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDCUTOR DEVICE...
- Publication number 20100304547
- Publication date Dec 2, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTROL OF DOPANT DIFFUSION FROM BURIED LAYERS IN BIPOLAR INTEGRATE...
- Publication number 20100279481
- Publication date Nov 4, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
USE OF IN-SITU HCL ETCH TO ELIMINATE BY OXIDATION RECRYSTALLIZATION...
- Publication number 20100216286
- Publication date Aug 26, 2010
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION OF HIGH-K METAL-GATE STACK INTO DIRECT SILICON BONDING...
- Publication number 20100047993
- Publication date Feb 25, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BORDER REGION DEFECT REDUCTION IN HYBRID ORIENTATION TECHNOLOGY (HO...
- Publication number 20100032727
- Publication date Feb 11, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION SCHEME FOR REDUCING BORDER REGION MORPPHOLOGY IN HYBRID...
- Publication number 20090159932
- Publication date Jun 25, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATION SCHEME FOR CHANGING CRYSTAL ORIENTATION IN HYBRID ORIEN...
- Publication number 20090159933
- Publication date Jun 25, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO ELIMINATE RE-CRYSTALLIZATION BORDER DEFECTS GENERATED DUR...
- Publication number 20090130817
- Publication date May 21, 2009
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE I...
- Publication number 20090057816
- Publication date Mar 5, 2009
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO IMPROVE PERFORMANCE OF SECONDARY ACTIVE COMPONENTS IN AN...
- Publication number 20090014805
- Publication date Jan 15, 2009
- Periannan Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MAKING (100) NMOS AND (110) PMOS SIDEWALL SURFACE ON THE...
- Publication number 20080308847
- Publication date Dec 18, 2008
- Weize XIONG
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device Made by the Method of Producing Hybrid Orientn...
- Publication number 20080303027
- Publication date Dec 11, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Rick L. Wise
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Advanced CMOS Using Super Steep Retrograde Wells
- Publication number 20080132012
- Publication date Jun 5, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device Manufactured Using Passivation of Crystal Doma...
- Publication number 20080128821
- Publication date Jun 5, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Angelo Pinto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Advanced CMOS using Super Steep Retrograde Wells
- Publication number 20060197158
- Publication date Sep 7, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Control of dopant diffusion from buried layers in bipolar integrate...
- Publication number 20050250289
- Publication date Nov 10, 2005
- Jeffrey A. Babcock
- H01 - BASIC ELECTRIC ELEMENTS

Angelo Pinto

Person

Patents Grantslast 30 patents

Mixed pitch track pattern

Integration scheme for changing crystal orientation in hybrid orien...

Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

Reduction of STI corner defects during SPE in semiconductor device...

Advanced CMOS using super steep retrograde wells

Integration scheme for changing crystal orientation in hybrid orien...

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

Control of dopant diffusion from buried layers in bipolar integrate...

Method for forming integrated circuits with aligned (100) NMOS and...

Advanced CMOS using super steep retrograde wells

Method to eliminate re-crystallization border defects generated dur...

Integration scheme for reducing border region morphology in hybrid...

Integration of high-k metal gate stack into direct silicon bonding...

Use of in-situ HCL etch to eliminate by oxidation recrystallization...

Method of making (100) NMOS and (110) PMOS sidewall surface on the...

Integration scheme for changing crystal orientation in hybrid orien...

Border region defect reduction in hybrid orientation technology (HO...

Semiconductor device made by the method of producing hybrid orientn...

Advanced CMOS using super steep retrograde wells

Method to improve performance of secondary active components in an...

Advanced CMOS using super steep retrograde wells

Method of fabricating an epitaxial silicon-germanium layer and an i...

Structure of semiconductor device with sinker contact region

Lateral heterojunction bipolar transistor

Bipolar junction transistor with a counterdoped collector region

Method for manufacturing a bipolar junction transistor

Method for manufacturing a semiconductor device with sinker contact...

Lateral heterojunction bipolar transistor

Semiconductor device with a collector contact in a depressed well-r...

Patents Applicationslast 30 patents

MIXED PITCH TRACK PATTERN

CELL ARCHITECTURE FOR A SEMICONDUCTOR DEVICE

DIGITAL CURRENT MEASUREMENT FOR IN-SITU DEVICE MONITORING

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

INTEGRATION SCHEME FOR CHANGING CRYSTAL ORIENTATION IN HYBRID ORIEN...

REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDUCTOR DEVICE...

CIRCUIT AND METHOD FOR TESTING INSULATING MATERIAL

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

ADVANCED CMOS USING SUPER STEEP RETROGRADE WELLS

INTEGRATION SCHEME FOR REDUCING BORDER REGION MORPHOLOGY IN HYBRID...

METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...

INTEGRATION SCHEME FOR CHANGING CRYSTAL ORIENTATION IN HYBRID ORIEN...

ADVANCED CMOS USING SUPER STEEP RETROGRADE WELLS

REDUCTION OF STI CORNER DEFECTS DURING SPE IN SEMICONDCUTOR DEVICE...

CONTROL OF DOPANT DIFFUSION FROM BURIED LAYERS IN BIPOLAR INTEGRATE...

USE OF IN-SITU HCL ETCH TO ELIMINATE BY OXIDATION RECRYSTALLIZATION...

INTEGRATION OF HIGH-K METAL-GATE STACK INTO DIRECT SILICON BONDING...

BORDER REGION DEFECT REDUCTION IN HYBRID ORIENTATION TECHNOLOGY (HO...

INTEGRATION SCHEME FOR REDUCING BORDER REGION MORPPHOLOGY IN HYBRID...

INTEGRATION SCHEME FOR CHANGING CRYSTAL ORIENTATION IN HYBRID ORIEN...

METHOD TO ELIMINATE RE-CRYSTALLIZATION BORDER DEFECTS GENERATED DUR...

METHOD TO REDUCE RESIDUAL STI CORNER DEFECTS GENERATED DURING SPE I...

METHOD TO IMPROVE PERFORMANCE OF SECONDARY ACTIVE COMPONENTS IN AN...

METHOD OF MAKING (100) NMOS AND (110) PMOS SIDEWALL SURFACE ON THE...

Semiconductor Device Made by the Method of Producing Hybrid Orientn...

Advanced CMOS Using Super Steep Retrograde Wells

Semiconductor Device Manufactured Using Passivation of Crystal Doma...

Advanced CMOS using Super Steep Retrograde Wells

Control of dopant diffusion from buried layers in bipolar integrate...