Benjamin Louie

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
NAND string utilizing floating body memory cell
- Patent number 12,171,093
- Issue date Dec 17, 2024
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory device having electrically floating body...
- Patent number 12,080,349
- Issue date Sep 3, 2024
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having electrically floating body transistor
- Patent number 11,985,809
- Issue date May 14, 2024
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell comprising first and second transistors and methods of...
- Patent number 11,974,425
- Issue date Apr 30, 2024
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Grant
MRAM access coordination systems and methods via pipeline in parallel
- Patent number 11,941,299
- Issue date Mar 26, 2024
- Integrated Silicon Solution, (Cayman) Inc.
- Benjamin Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Content addressable memory device having electrically floating body...
- Patent number 11,881,264
- Issue date Jan 23, 2024
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND string utilizing floating body memory cell
- Patent number 11,818,878
- Issue date Nov 14, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for reducing standby power in floating body mem...
- Patent number 11,769,550
- Issue date Sep 26, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Scalable floating body memory cell for memory compilers and method...
- Patent number 11,699,484
- Issue date Jul 11, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Content addressable memory device having electrically floating body...
- Patent number 11,594,280
- Issue date Feb 28, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Word line decoder memory architecture
- Patent number 11,423,965
- Issue date Aug 23, 2022
- Integrated Silicon Solution, (Cayman) Inc.
- Neal Berger
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device having electrically floating body transistor
- Patent number 11,417,657
- Issue date Aug 16, 2022
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND string utilizing floating body memory cell
- Patent number 11,417,658
- Issue date Aug 16, 2022
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit engine for managing memory meta-stability
- Patent number 11,386,010
- Issue date Jul 12, 2022
- Integrated Silicon Solution, (Cayman) Inc.
- Neal Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory cell comprising first and second transistors and methods of...
- Patent number 11,348,922
- Issue date May 31, 2022
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for reducing standby power in floating body mem...
- Patent number 11,342,018
- Issue date May 24, 2022
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Grant
MRAM access coordination systems and methods with a plurality of pi...
- Patent number 11,334,288
- Issue date May 17, 2022
- Integrated Silicon Solution, (Cayman) Inc.
- Benjamin Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable floating body memory cell for memory compilers and method...
- Patent number 11,217,300
- Issue date Jan 4, 2022
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error cache segmentation for power reduction
- Patent number 11,151,042
- Issue date Oct 19, 2021
- Integrated Silicon Solution, (Cayman) Inc.
- Benjamin Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Content addressable memory device having electrically floating body...
- Patent number 11,100,994
- Issue date Aug 24, 2021
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MRAM noise mitigation for write operations with simultaneous backgr...
- Patent number 11,010,294
- Issue date May 18, 2021
- Spin Memory, Inc.
- Benjamin Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MRAM noise mitigation for background operations by delaying verify...
- Patent number 10,990,465
- Issue date Apr 27, 2021
- Spin Memory, Inc.
- Benjamin Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
NAND string utilizing floating body memory cell
- Patent number 10,991,697
- Issue date Apr 27, 2021
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bi-polar write scheme
- Patent number 10,991,410
- Issue date Apr 27, 2021
- Spin Memory, Inc.
- Neal Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having electrically floating body transistor
- Patent number 10,978,455
- Issue date Apr 13, 2021
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with individually trimmable sense amplifiers
- Patent number 10,930,332
- Issue date Feb 23, 2021
- Spin Memory, Inc.
- Susmita Karmakar
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with horizontal source line and a virtual source line
- Patent number 10,891,997
- Issue date Jan 12, 2021
- Spin Memory, Inc.
- Neal Berger
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory device having electrically floating body...
- Patent number 10,839,905
- Issue date Nov 17, 2020
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chip module for MRAM devices with levels of dynamic redundanc...
- Patent number 10,818,331
- Issue date Oct 27, 2020
- Spin Memory, Inc.
- Benjamin Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Master slave level shift latch for word line decoder memory archite...
- Patent number 10,803,949
- Issue date Oct 13, 2020
- Spin Memory, Inc.
- Neal Berger
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NAND String Utilizing Floating Body Memory Cell
- Publication number 20250063718
- Publication date Feb 20, 2025
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
Content Addressable Memory Device Having Electrically Floating Body...
- Publication number 20240395323
- Publication date Nov 28, 2024
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Electrically Floating Body Transistor
- Publication number 20240260252
- Publication date Aug 1, 2024
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Cell Comprising First and Second Transistors and Methods of...
- Publication number 20240243492
- Publication date Jul 18, 2024
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND String Utilizing Floating Body Memory Cell
- Publication number 20240040767
- Publication date Feb 1, 2024
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
Content Addressable Memory Device Having Electrically Floating Body...
- Publication number 20230420048
- Publication date Dec 28, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Reducing Standby Power in Floating Body Mem...
- Publication number 20230395138
- Publication date Dec 7, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
SCALABLE FLOATING BODY MEMORY CELL FOR MEMORY COMPILERS AND METHOD...
- Publication number 20230307039
- Publication date Sep 28, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Content Addressable Memory Device Having Electrically Floating Body...
- Publication number 20230162790
- Publication date May 25, 2023
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
NAND String Utilizing Floating Body Memory Cell
- Publication number 20220367472
- Publication date Nov 17, 2022
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Electrically Floating Body Transistor
- Publication number 20220359522
- Publication date Nov 10, 2022
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Application
MRAM ACCESS COORDINATION SYSTEMS AND METHODS
- Publication number 20220276807
- Publication date Sep 1, 2022
- Integrated Silicon Solution, (Cayman) Inc.
- Benjamin LOUIE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Cell Comprising First and Second Transistors and Methods of...
- Publication number 20220278104
- Publication date Sep 1, 2022
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Reducing Standby Power in Floating Body Mem...
- Publication number 20220262430
- Publication date Aug 18, 2022
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
SCALABLE FLOATING BODY MEMORY CELL FOR MEMORY COMPILERS AND METHOD...
- Publication number 20220115061
- Publication date Apr 14, 2022
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Content Addressable Memory Device Having Electrically Floating Body...
- Publication number 20210358547
- Publication date Nov 18, 2021
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Electrically Floating Body Transistor
- Publication number 20210225844
- Publication date Jul 22, 2021
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NAND String Utilizing Floating Body Memory Cell
- Publication number 20210217754
- Publication date Jul 15, 2021
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUIT ENGINE FOR MANAGING MEMORY META-STABILITY
- Publication number 20210089455
- Publication date Mar 25, 2021
- Spin Memory, Inc.
- Neal BERGER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Content Addressable Memory Device Having Electrically Floating Body...
- Publication number 20210057027
- Publication date Feb 25, 2021
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory Cell Comprising First and Second Transistors and Methods of...
- Publication number 20200411521
- Publication date Dec 31, 2020
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Application
Systems and Methods for Reducing Standby Power in Floating Body Mem...
- Publication number 20200335156
- Publication date Oct 22, 2020
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
Master Slave Level Shift Latch for Word Line Decoder Memory Archite...
- Publication number 20200286561
- Publication date Sep 10, 2020
- Neal BERGER
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Device Having Electrically Floating Body Transistor
- Publication number 20200227415
- Publication date Jul 16, 2020
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Application
WORD LINE DECODER MEMORY ARCHITECTURE
- Publication number 20200227102
- Publication date Jul 16, 2020
- Spin Memory, Inc.
- Neal BERGER
- G11 - INFORMATION STORAGE
Information Patent Application
NAND String Utilizing Floating Body Memory Cell
- Publication number 20200111792
- Publication date Apr 9, 2020
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G11 - INFORMATION STORAGE
Information Patent Application
WORD LINE DECODER MEMORY ARCHITECTURE
- Publication number 20200090721
- Publication date Mar 19, 2020
- Spin Memory, Inc.
- Neal BERGER
- G11 - INFORMATION STORAGE
Information Patent Application
SCALABLE FLOATING BODY MEMORY CELL FOR MEMORY COMPILERS AND METHOD...
- Publication number 20200075091
- Publication date Mar 5, 2020
- Zeno Semiconductor, Inc.
- Benjamin S. Louie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MRAM NOISE MITIGATION FOR BACKGROUND OPERATIONS BY DELAYING VERIFY...
- Publication number 20200057687
- Publication date Feb 20, 2020
- Spin Memory, Inc.
- Benjamin LOUIE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MRAM NOISE MITIGATION FOR WRITE OPERATIONS WITH SIMULTANEOUS BACKGR...
- Publication number 20200050545
- Publication date Feb 13, 2020
- Spin Memory, Inc.
- Benjamin LOUIE
- G06 - COMPUTING CALCULATING COUNTING

Benjamin Louie

Person

Patents Grantslast 30 patents

NAND string utilizing floating body memory cell

Content addressable memory device having electrically floating body...

Memory device having electrically floating body transistor

Memory cell comprising first and second transistors and methods of...

MRAM access coordination systems and methods via pipeline in parallel

Content addressable memory device having electrically floating body...

NAND string utilizing floating body memory cell

Systems and methods for reducing standby power in floating body mem...

Scalable floating body memory cell for memory compilers and method...

Content addressable memory device having electrically floating body...

Word line decoder memory architecture

Memory device having electrically floating body transistor

NAND string utilizing floating body memory cell

Circuit engine for managing memory meta-stability

Memory cell comprising first and second transistors and methods of...

Systems and methods for reducing standby power in floating body mem...

MRAM access coordination systems and methods with a plurality of pi...

Scalable floating body memory cell for memory compilers and method...

Error cache segmentation for power reduction

Content addressable memory device having electrically floating body...

MRAM noise mitigation for write operations with simultaneous backgr...

MRAM noise mitigation for background operations by delaying verify...

NAND string utilizing floating body memory cell

Bi-polar write scheme

Memory device having electrically floating body transistor

Memory array with individually trimmable sense amplifiers

Memory array with horizontal source line and a virtual source line

Content addressable memory device having electrically floating body...

Multi-chip module for MRAM devices with levels of dynamic redundanc...

Master slave level shift latch for word line decoder memory archite...

Patents Applicationslast 30 patents

NAND String Utilizing Floating Body Memory Cell

Content Addressable Memory Device Having Electrically Floating Body...

Memory Device Having Electrically Floating Body Transistor

Memory Cell Comprising First and Second Transistors and Methods of...

NAND String Utilizing Floating Body Memory Cell

Content Addressable Memory Device Having Electrically Floating Body...

Systems and Methods for Reducing Standby Power in Floating Body Mem...

SCALABLE FLOATING BODY MEMORY CELL FOR MEMORY COMPILERS AND METHOD...

Content Addressable Memory Device Having Electrically Floating Body...

NAND String Utilizing Floating Body Memory Cell

Memory Device Having Electrically Floating Body Transistor

MRAM ACCESS COORDINATION SYSTEMS AND METHODS

Memory Cell Comprising First and Second Transistors and Methods of...

Systems and Methods for Reducing Standby Power in Floating Body Mem...

SCALABLE FLOATING BODY MEMORY CELL FOR MEMORY COMPILERS AND METHOD...

Content Addressable Memory Device Having Electrically Floating Body...

Memory Device Having Electrically Floating Body Transistor

NAND String Utilizing Floating Body Memory Cell

CIRCUIT ENGINE FOR MANAGING MEMORY META-STABILITY

Content Addressable Memory Device Having Electrically Floating Body...

Memory Cell Comprising First and Second Transistors and Methods of...

Systems and Methods for Reducing Standby Power in Floating Body Mem...

Master Slave Level Shift Latch for Word Line Decoder Memory Archite...

Memory Device Having Electrically Floating Body Transistor

WORD LINE DECODER MEMORY ARCHITECTURE

NAND String Utilizing Floating Body Memory Cell

WORD LINE DECODER MEMORY ARCHITECTURE

SCALABLE FLOATING BODY MEMORY CELL FOR MEMORY COMPILERS AND METHOD...

MRAM NOISE MITIGATION FOR BACKGROUND OPERATIONS BY DELAYING VERIFY...

MRAM NOISE MITIGATION FOR WRITE OPERATIONS WITH SIMULTANEOUS BACKGR...