Bo-I Lee

Person

Sindian, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for chemically mechanically polishing
- Patent number 11,413,722
- Issue date Aug 16, 2022
- Taiwan Semiconductor Manufacturing Company Ltd.
- Bo-I Lee
- B24 - GRINDING POLISHING
Information Patent Grant
Method and apparatus for performing a polishing process in semicond...
- Patent number 10,857,649
- Issue date Dec 8, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- B24 - GRINDING POLISHING
Information Patent Grant
Method of manufacturing semiconductor device by applying molding la...
- Patent number 10,163,710
- Issue date Dec 25, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming wafer-level molded structure for package assembly
- Patent number 9,754,917
- Issue date Sep 5, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through silicon via bonding structure
- Patent number 9,673,174
- Issue date Jun 6, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacturing semiconductor package including forming a r...
- Patent number 9,570,368
- Issue date Feb 14, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for real-time error detection in CMP processing
- Patent number 9,403,254
- Issue date Aug 2, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- James Jeng-Jyi Hwang
- B24 - GRINDING POLISHING
Information Patent Grant
Semiconductor package including a substrate with a stepped sidewall...
- Patent number 9,406,632
- Issue date Aug 2, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having a recess filled with a molding compound
- Patent number 9,275,924
- Issue date Mar 1, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacture and method of making the same
- Patent number 9,242,342
- Issue date Jan 26, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- B24 - GRINDING POLISHING
Information Patent Grant
CMP pad cleaning apparatus
- Patent number 9,138,861
- Issue date Sep 22, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jiann Lih Wu
- B24 - GRINDING POLISHING
Information Patent Grant
Method of forming wafer-level molded structure for package assembly
- Patent number 9,117,939
- Issue date Aug 25, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- B32 - LAYERED PRODUCTS
Information Patent Grant
Through silicon via bonding structure
- Patent number 8,932,906
- Issue date Jan 13, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Dean Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Delamination resistance of stacked dies in die saw
- Patent number 8,803,332
- Issue date Aug 12, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer-level molded structure for package assembly
- Patent number 8,743,561
- Issue date Jun 3, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- B32 - LAYERED PRODUCTS
Information Patent Grant
Method of forming stacked-die packages
- Patent number 8,426,256
- Issue date Apr 23, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- C. W. Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding metallurgy for three-dimensional interconnect
- Patent number 8,242,611
- Issue date Aug 14, 2012
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bonding metallurgy for three-dimensional interconnect
- Patent number 7,851,346
- Issue date Dec 14, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing stackable dies
- Patent number 7,687,311
- Issue date Mar 30, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHOD FOR CHEMICALLY MECHANICALLY POLISHING
- Publication number 20200306929
- Publication date Oct 1, 2020
- Taiwan Semiconductor Manufacturing company Ltd.
- Bo-I Lee
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20160329247
- Publication date Nov 10, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PLANARIZING A WAFER
- Publication number 20160136776
- Publication date May 19, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I LEE
- B24 - GRINDING POLISHING
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
- Publication number 20150380275
- Publication date Dec 31, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming Wafer-Level Molded Structure for Package Assembly
- Publication number 20150318271
- Publication date Nov 5, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR CHEMICALLY MECHANICALLY POLISHING
- Publication number 20150158143
- Publication date Jun 11, 2015
- Taiwan Semiconductor Manufacturing company Ltd.
- BO-I LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Through Silicon Via Bonding Structure
- Publication number 20150137328
- Publication date May 21, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Dean Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20140346669
- Publication date Nov 27, 2014
- Tsung-Ding WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of Forming Wafer-Level Molded Structure for Package Assembly
- Publication number 20140206140
- Publication date Jul 24, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- B32 - LAYERED PRODUCTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
- Publication number 20140048926
- Publication date Feb 20, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURE AND METHOD OF MAKING THE SAME
- Publication number 20130244552
- Publication date Sep 19, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- B24 - GRINDING POLISHING
Information Patent Application
CMP Groove Depth and Conditioning Disk Monitoring
- Publication number 20130217306
- Publication date Aug 22, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Jiann Lih Wu
- B24 - GRINDING POLISHING
Information Patent Application
CMP Pad Cleaning Apparatus
- Publication number 20130210323
- Publication date Aug 15, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Jiann Lih Wu
- B24 - GRINDING POLISHING
Information Patent Application
Multiple Zone Temperature Control for CMP
- Publication number 20130210173
- Publication date Aug 15, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Jiann Lih Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING A POLISHING PROCESS IN SEMICOND...
- Publication number 20130078810
- Publication date Mar 28, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- B24 - GRINDING POLISHING
Information Patent Application
Apparatus and Methods for Real-Time Error Detection in CMP Processing
- Publication number 20130044004
- Publication date Feb 21, 2013
- Taiwan Semiconductor Manufacturing Company, Ltd.
- James Jeng-Jyi Hwang
- B24 - GRINDING POLISHING
Information Patent Application
Delamination Resistance of Stacked Dies in Die Saw
- Publication number 20110062592
- Publication date Mar 17, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bonding Metallurgy for Three-Dimensional Interconnect
- Publication number 20110058346
- Publication date Mar 10, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer-Level Molded Structure for Package Assembly
- Publication number 20110051378
- Publication date Mar 3, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Ding Wang
- B32 - LAYERED PRODUCTS
Information Patent Application
METHOD OF FORMING STACKED-DIE PACKAGES
- Publication number 20100279463
- Publication date Nov 4, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- C. W. Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method for Integrated Circuit Fabrication
- Publication number 20100225011
- Publication date Sep 9, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Through Silicon Via Bonding Structure
- Publication number 20100047963
- Publication date Feb 25, 2010
- Dean Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Bonding Metallurgy for Three-Dimensional Interconnect
- Publication number 20100015792
- Publication date Jan 21, 2010
- Bo-I Lee
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Apparatus and method for chemically mechanically polishing

Method and apparatus for performing a polishing process in semicond...

Method of manufacturing semiconductor device by applying molding la...

Method of forming wafer-level molded structure for package assembly

Through silicon via bonding structure

Method of manufacturing semiconductor package including forming a r...

Methods for real-time error detection in CMP processing

Semiconductor package including a substrate with a stepped sidewall...

Semiconductor package having a recess filled with a molding compound

Manufacture and method of making the same

CMP pad cleaning apparatus

Method of forming wafer-level molded structure for package assembly

Through silicon via bonding structure

Delamination resistance of stacked dies in die saw

Wafer-level molded structure for package assembly

Method of forming stacked-die packages

Bonding metallurgy for three-dimensional interconnect

Bonding metallurgy for three-dimensional interconnect

Method for producing stackable dies

Patents Applicationslast 30 patents

APPARATUS AND METHOD FOR CHEMICALLY MECHANICALLY POLISHING

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

METHOD OF PLANARIZING A WAFER

METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

Method of Forming Wafer-Level Molded Structure for Package Assembly

APPARATUS AND METHOD FOR CHEMICALLY MECHANICALLY POLISHING

Through Silicon Via Bonding Structure

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Method of Forming Wafer-Level Molded Structure for Package Assembly

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

MANUFACTURE AND METHOD OF MAKING THE SAME

CMP Groove Depth and Conditioning Disk Monitoring

CMP Pad Cleaning Apparatus

Multiple Zone Temperature Control for CMP

METHOD AND APPARATUS FOR PERFORMING A POLISHING PROCESS IN SEMICOND...

Apparatus and Methods for Real-Time Error Detection in CMP Processing

Delamination Resistance of Stacked Dies in Die Saw

Bonding Metallurgy for Three-Dimensional Interconnect

Wafer-Level Molded Structure for Package Assembly

METHOD OF FORMING STACKED-DIE PACKAGES

System and Method for Integrated Circuit Fabrication

Through Silicon Via Bonding Structure

Bonding Metallurgy for Three-Dimensional Interconnect