Chi-hing Choi

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Metal to ILD adhesion improvement by reactive sputtering
- Patent number 6,746,727
- Issue date Jun 8, 2004
- Intel Corporation
- Jick Yu
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
In-situ silicon nitride and silicon based oxide deposition with gra...
- Patent number 6,642,141
- Issue date Nov 4, 2003
- Intel Corporation
- Preston Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ silicon nitride and silicon based oxide deposition with gra...
- Patent number 6,507,081
- Issue date Jan 14, 2003
- Intel Corporation
- Preston Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-situ silicon nitride and silicon based oxide deposition with gra...
- Patent number 6,255,233
- Issue date Jul 3, 2001
- Intel Corporation
- Preston Smith
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH DIFFERENTIAL EPITAXIAL SOURCE OR...
- Publication number 20250006733
- Publication date Jan 2, 2025
- Intel Corporation
- Swapnadip GHOSH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-RESISTANCE VIA STRUCTURES
- Publication number 20250006592
- Publication date Jan 2, 2025
- Intel Corporation
- Ming-Yi Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICES WITH CONTACTS USING NITRIDIZED MOLYBDENUM
- Publication number 20240105508
- Publication date Mar 28, 2024
- Intel Corporation
- Jitendra Kumar Jha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH PHOSPHIDE OR ARSE...
- Publication number 20240006506
- Publication date Jan 4, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH BORIDE, INDIUM, O...
- Publication number 20240006533
- Publication date Jan 4, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAPPING SOURCE AND DRAIN REGIONS OF TRANSISTORS TO PREVENT DIFFUSIO...
- Publication number 20240006488
- Publication date Jan 4, 2024
- Intel Corporation
- Nazila Haratipour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE AND DRAIN REFRACTORY METAL CAP
- Publication number 20240006494
- Publication date Jan 4, 2024
- Intel Corporation
- Nazila Haratipour
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIGE:GAB SOURCE OR DRAIN STRUCTURES WITH LOW RESISTIVITY
- Publication number 20230420456
- Publication date Dec 28, 2023
- Intel Corporation
- Debaleena NANDI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOURCE OR DRAIN STRUCTURES WITH SELECTIVE SILICIDE CONTACTS THEREON
- Publication number 20230317789
- Publication date Oct 5, 2023
- Intel Corporation
- Dan S. LAVRIC
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACT OVER ACTIVE GATE STRUCTURES WITH TRENCH CONTACT LAYERS FOR...
- Publication number 20230197804
- Publication date Jun 22, 2023
- Nazila HARATIPOUR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON RICH CAPPING LAYER PRE-AMORPHIZED WITH GERMANIUM AND BORON...
- Publication number 20230101725
- Publication date Mar 30, 2023
- Intel Corporation
- Debaleena NANDI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW GERMANIUM, HIGH BORON SILICON RICH CAPPING LAYER FOR PMOS CONTA...
- Publication number 20220416050
- Publication date Dec 29, 2022
- Intel Corporation
- Debaleena NANDI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CO-DEPOSITION OF TITANIUM AND SILICON FOR IMPROVED SILICON GERMANIU...
- Publication number 20220416032
- Publication date Dec 29, 2022
- Intel Corporation
- Debaleena Nandi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL CONTACT PROCESS WITH SELECTIVE DEPOSITION
- Publication number 20220102506
- Publication date Mar 31, 2022
- Intel Corporation
- Kevin COOK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flourine doped SiO2 film and method of fabrication
- Publication number 20030209805
- Publication date Nov 13, 2003
- Chi-Hing Choi
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
In-situ silicon nitride and silicon based oxide deposition with gra...
- Publication number 20010019175
- Publication date Sep 6, 2001
- Preston Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
In-situ silicon nitride and silicon based oxide deposition with gra...
- Publication number 20010016428
- Publication date Aug 23, 2001
- Preston Smith
- H01 - BASIC ELECTRIC ELEMENTS

Chi-hing Choi

Person

Patents Grantslast 30 patents

Metal to ILD adhesion improvement by reactive sputtering

In-situ silicon nitride and silicon based oxide deposition with gra...

In-situ silicon nitride and silicon based oxide deposition with gra...

In-situ silicon nitride and silicon based oxide deposition with gra...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT STRUCTURES WITH DIFFERENTIAL EPITAXIAL SOURCE OR...

LOW-RESISTANCE VIA STRUCTURES

INTEGRATED CIRCUIT DEVICES WITH CONTACTS USING NITRIDIZED MOLYBDENUM

LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH PHOSPHIDE OR ARSE...

LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH BORIDE, INDIUM, O...

CAPPING SOURCE AND DRAIN REGIONS OF TRANSISTORS TO PREVENT DIFFUSIO...

SOURCE AND DRAIN REFRACTORY METAL CAP

SIGE:GAB SOURCE OR DRAIN STRUCTURES WITH LOW RESISTIVITY

SOURCE OR DRAIN STRUCTURES WITH SELECTIVE SILICIDE CONTACTS THEREON

CONTACT OVER ACTIVE GATE STRUCTURES WITH TRENCH CONTACT LAYERS FOR...

SILICON RICH CAPPING LAYER PRE-AMORPHIZED WITH GERMANIUM AND BORON...

LOW GERMANIUM, HIGH BORON SILICON RICH CAPPING LAYER FOR PMOS CONTA...

CO-DEPOSITION OF TITANIUM AND SILICON FOR IMPROVED SILICON GERMANIU...

DUAL CONTACT PROCESS WITH SELECTIVE DEPOSITION

Flourine doped SiO2 film and method of fabrication

In-situ silicon nitride and silicon based oxide deposition with gra...

In-situ silicon nitride and silicon based oxide deposition with gra...