Chung-Hsun Lin

Person

White Plains, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Nanoribbon sub-fin isolation by backside Si substrate removal etch...
- Patent number 12,328,920
- Issue date Jun 10, 2025
- Intel Corporation
- William Hsu
Information Patent Grant
Substrate-less silicon controlled rectifier (SCR) integrated circui...
- Patent number 12,328,947
- Issue date Jun 10, 2025
- Intel Corporation
- Rui Ma
Information Patent Grant
Substrate-free integrated circuit structures
- Patent number 12,317,590
- Issue date May 27, 2025
- Intel Corporation
- Biswajeet Guha
Information Patent Grant
Gate-all-around integrated circuit structures having insulator subs...
- Patent number 12,294,006
- Issue date May 6, 2025
- Intel Corporation
- Chung-Hsun Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having devices with s...
- Patent number 12,288,789
- Issue date Apr 29, 2025
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having adjacent struc...
- Patent number 12,272,737
- Issue date Apr 8, 2025
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for multiple object tracking
- Patent number 12,205,306
- Issue date Jan 21, 2025
- International Business Machines Corporation
- Chung-Ching Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Substrate-less electrostatic discharge (ESD) integrated circuit str...
- Patent number 12,166,031
- Issue date Dec 10, 2024
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dynamic multi-resolution processing for video classification
- Patent number 11,954,910
- Issue date Apr 9, 2024
- International Business Machines Corporation
- Rameswar Panda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Gate-all-around integrated circuit structures having devices with s...
- Patent number 11,908,856
- Issue date Feb 20, 2024
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures including varactors
- Patent number 11,869,987
- Issue date Jan 9, 2024
- Intel Corporation
- Ayan Kar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having adjacent deep...
- Patent number 11,837,641
- Issue date Dec 5, 2023
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having devices with c...
- Patent number 11,824,116
- Issue date Nov 21, 2023
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having adjacent struc...
- Patent number 11,799,009
- Issue date Oct 24, 2023
- Intel Corporation
- Biswajeet Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures including varactors
- Patent number 11,417,781
- Issue date Aug 16, 2022
- Intel Corporation
- Ayan Kar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for perspective preserving stitching and summariz...
- Patent number 11,282,249
- Issue date Mar 22, 2022
- International Business Machines Corporation
- Chung-Ching Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aerial videos compression
- Patent number 11,172,225
- Issue date Nov 9, 2021
- International Business Machines Corporation
- Chung-Ching Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit defect detection using pattern images
- Patent number 10,755,404
- Issue date Aug 25, 2020
- International Business Machines Corporation
- Chung-Ching Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated focusing of a microscope of an optical inspection system
- Patent number 10,755,397
- Issue date Aug 25, 2020
- International Business Machines Corporation
- Franco Stellari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chemoepitaxy etch trim using a self aligned hard mask for metal lin...
- Patent number 10,600,680
- Issue date Mar 24, 2020
- International Business Machines Corporation
- Markus Brink
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Strained semiconductor nanowire
- Patent number 10,580,894
- Issue date Mar 3, 2020
- International Business Machines Corporation
- Josephine B. Chang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
System and method for perspective preserving stitching and summariz...
- Patent number 10,553,005
- Issue date Feb 4, 2020
- International Business Machines Corporation
- Chung-Ching Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-destructive determination of components of integrated circuits
- Patent number 10,386,409
- Issue date Aug 20, 2019
- International Business Machines Corporation
- Lynne M. Gignac
- G01 - MEASURING TESTING
Information Patent Grant
Asymmetric high-k dielectric for reducing gate induced drain leakage
- Patent number 10,381,452
- Issue date Aug 13, 2019
- International Business Machines Corporation
- Anthony I. Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric high-k dielectric for reducing gate induced drain leakage
- Patent number 10,374,048
- Issue date Aug 6, 2019
- International Business Machines Corporation
- Anthony I. Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asymmetric high-k dielectric for reducing gate induced drain leakage
- Patent number 10,367,072
- Issue date Jul 30, 2019
- International Business Machines Corporation
- Anthony I. Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System, method, and recording medium for compressing aerial videos
- Patent number 10,306,267
- Issue date May 28, 2019
- International Business Machines Corporation
- Chung-Ching Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Surface reflectance reduction in images using non-specular portion...
- Patent number 10,255,674
- Issue date Apr 9, 2019
- International Business Machines Corporation
- Noel C. Codella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chemoepitaxy etch trim using a self aligned hard mask for metal lin...
- Patent number 10,256,139
- Issue date Apr 9, 2019
- International Business Machines Corporation
- Markus Brink
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Distributed processing for producing three-dimensional reconstructions
- Patent number 10,217,225
- Issue date Feb 26, 2019
- International Business Machines Corporation
- Aleksandr Y. Aravkin
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT DEVICE WITH SEMICONDUCTOR STRUCTURE EXTENDING AC...
- Publication number 20250203975
- Publication date Jun 19, 2025
- Guowei Xu
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH TRANSISTOR GATE-CHANNEL ARRANGEM...
- Publication number 20250194070
- Publication date Jun 12, 2025
- Tao Chu
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH BACKSIDE CONTACTS AND ASYMMETRIC...
- Publication number 20250194179
- Publication date Jun 12, 2025
- Tao Chu
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH DIFFERENT NANORIBBON THICKNESSES
- Publication number 20250169130
- Publication date May 22, 2025
- Intel Corporation
- Tao Chu
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH DEEP VIA BAR WIDTH TUNING
- Publication number 20250112120
- Publication date Apr 3, 2025
- Intel Corporation
- Tao CHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTIPLE VOLTAGE THRESHOLD INTEGRATED CIRCUIT STRUCTURE WITH LOCAL...
- Publication number 20250113595
- Publication date Apr 3, 2025
- Intel Corporation
- Tao CHU
Information Patent Application
TRENCH CONTACT STRUCTURE WITH ETCH-STOP LAYER
- Publication number 20250113559
- Publication date Apr 3, 2025
- Intel Corporation
- Guowei XU
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED LOCAL LAYOUT EFFECTS
- Publication number 20250107175
- Publication date Mar 27, 2025
- Intel Corporation
- Tao CHU
Information Patent Application
DIELECTRIC ISOLATION BETWEEN EPITAXIAL REGIONS AND SUBFIN REGIONS
- Publication number 20250107156
- Publication date Mar 27, 2025
- Intel Corporation
- Chiao-Ti Huang
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH PATCH SPACERS
- Publication number 20250098260
- Publication date Mar 20, 2025
- Intel Corporation
- Guowei XU
Information Patent Application
PERFORMANCE OPTIMIZATION OF TRANSISTORS SHARING CHANNEL STRUCTURES...
- Publication number 20250006734
- Publication date Jan 2, 2025
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BURIED LOW-K DIELECTRIC TO PROTECT SOURCE/DRAIN TO GATE CONNECTION
- Publication number 20240334669
- Publication date Oct 3, 2024
- Intel Corporation
- Chiao-Ti Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANORIBBON-BASED TRANSISTORS WITH ETCH STOP LAYER TO ASSIST SUBFIN...
- Publication number 20240290835
- Publication date Aug 29, 2024
- Intel Corporation
- Chiao-Ti Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH SOURCE OR DRAIN CONTACTS HAVING...
- Publication number 20240178273
- Publication date May 30, 2024
- Intel Corporation
- Chiao-Ti HUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEVICES WITH S...
- Publication number 20240145471
- Publication date May 2, 2024
- Intel Corporation
- Biswajeet GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIDE CHANNEL DIODE STRUCTURE INCLUDING SUB-FIN
- Publication number 20240088132
- Publication date Mar 14, 2024
- Intel Corporation
- Nicholas A. Thomson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING ADJACENT DEEP...
- Publication number 20240055497
- Publication date Feb 15, 2024
- Intel Corporation
- Biswajeet GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEVICES WITH C...
- Publication number 20240038889
- Publication date Feb 1, 2024
- Intel Corporation
- Biswajeet GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING ADJACENT STRUC...
- Publication number 20240006504
- Publication date Jan 4, 2024
- Intel Corporation
- Biswajeet GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICES WITH DIODES INTEGRATED IN SUBFINS
- Publication number 20230420443
- Publication date Dec 28, 2023
- Nicholas A. Thomson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE PERFORMANCE TUNING BY DEEP TRENCH VIA (DVB) PROXIMITY EFFECT...
- Publication number 20230317594
- Publication date Oct 5, 2023
- Tao CHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE PROCESSING OF FINS IN FIN BASED TRANSISTOR DEVICES
- Publication number 20230307449
- Publication date Sep 28, 2023
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE END CAP AND BOUNDARY PLACEMENT IN TRANSISTOR STRUCTURES FOR N-...
- Publication number 20230071699
- Publication date Mar 9, 2023
- Intel Corporation
- Andrew Smith
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANORIBBON SUB-FIN ISOLATION BY BACKSIDE SI SUBSTRATE REMOVAL ETCH...
- Publication number 20220416027
- Publication date Dec 29, 2022
- Intel Corporation
- William HSU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE-LESS SILICON CONTROLLED RECTIFIER (SCR) INTEGRATED CIRCUI...
- Publication number 20220415881
- Publication date Dec 29, 2022
- Intel Corporation
- Rui MA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE-LESS LATERAL DIODE INTEGRATED CIRCUIT STRUCTURES
- Publication number 20220415925
- Publication date Dec 29, 2022
- Intel Corporation
- Nicholas THOMSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE-LESS NANOWIRE-BASED LATERAL DIODE INTEGRATED CIRCUIT STRU...
- Publication number 20220416022
- Publication date Dec 29, 2022
- Intel Corporation
- Nicholas THOMSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE-LESS DIODE, BIPOLAR AND FEEDTHROUGH INTEGRATED CIRCUIT ST...
- Publication number 20220415880
- Publication date Dec 29, 2022
- Intel Corporation
- Ayan KAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES INCLUDING VARACTORS
- Publication number 20220344519
- Publication date Oct 27, 2022
- Intel Corporation
- Ayan KAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DYNAMIC MULTI-RESOLUTION PROCESSING FOR VIDEO CLASSIFICATION
- Publication number 20220215198
- Publication date Jul 7, 2022
- International Business Machines Corporation
- Rameswar Panda
- G06 - COMPUTING CALCULATING COUNTING

Chung-Hsun Lin

Person

Patents Grantslast 30 patents

Nanoribbon sub-fin isolation by backside Si substrate removal etch...

Substrate-less silicon controlled rectifier (SCR) integrated circui...

Substrate-free integrated circuit structures

Gate-all-around integrated circuit structures having insulator subs...

Gate-all-around integrated circuit structures having devices with s...

Gate-all-around integrated circuit structures having adjacent struc...

System and method for multiple object tracking

Substrate-less electrostatic discharge (ESD) integrated circuit str...

Dynamic multi-resolution processing for video classification

Gate-all-around integrated circuit structures having devices with s...

Gate-all-around integrated circuit structures including varactors

Gate-all-around integrated circuit structures having adjacent deep...

Gate-all-around integrated circuit structures having devices with c...

Gate-all-around integrated circuit structures having adjacent struc...

Gate-all-around integrated circuit structures including varactors

System and method for perspective preserving stitching and summariz...

Aerial videos compression

Integrated circuit defect detection using pattern images

Automated focusing of a microscope of an optical inspection system

Chemoepitaxy etch trim using a self aligned hard mask for metal lin...

Strained semiconductor nanowire

System and method for perspective preserving stitching and summariz...

Non-destructive determination of components of integrated circuits

Asymmetric high-k dielectric for reducing gate induced drain leakage

Asymmetric high-k dielectric for reducing gate induced drain leakage

Asymmetric high-k dielectric for reducing gate induced drain leakage

System, method, and recording medium for compressing aerial videos

Surface reflectance reduction in images using non-specular portion...

Chemoepitaxy etch trim using a self aligned hard mask for metal lin...

Distributed processing for producing three-dimensional reconstructions

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT DEVICE WITH SEMICONDUCTOR STRUCTURE EXTENDING AC...

INTEGRATED CIRCUIT STRUCTURES WITH TRANSISTOR GATE-CHANNEL ARRANGEM...

INTEGRATED CIRCUIT STRUCTURES WITH BACKSIDE CONTACTS AND ASYMMETRIC...

INTEGRATED CIRCUIT STRUCTURES WITH DIFFERENT NANORIBBON THICKNESSES

INTEGRATED CIRCUIT STRUCTURE WITH DEEP VIA BAR WIDTH TUNING

MULTIPLE VOLTAGE THRESHOLD INTEGRATED CIRCUIT STRUCTURE WITH LOCAL...

TRENCH CONTACT STRUCTURE WITH ETCH-STOP LAYER

INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED LOCAL LAYOUT EFFECTS

DIELECTRIC ISOLATION BETWEEN EPITAXIAL REGIONS AND SUBFIN REGIONS

INTEGRATED CIRCUIT STRUCTURES WITH PATCH SPACERS

PERFORMANCE OPTIMIZATION OF TRANSISTORS SHARING CHANNEL STRUCTURES...

BURIED LOW-K DIELECTRIC TO PROTECT SOURCE/DRAIN TO GATE CONNECTION

NANORIBBON-BASED TRANSISTORS WITH ETCH STOP LAYER TO ASSIST SUBFIN...

INTEGRATED CIRCUIT STRUCTURES WITH SOURCE OR DRAIN CONTACTS HAVING...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEVICES WITH S...

WIDE CHANNEL DIODE STRUCTURE INCLUDING SUB-FIN

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING ADJACENT DEEP...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEVICES WITH C...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING ADJACENT STRUC...

INTEGRATED CIRCUIT DEVICES WITH DIODES INTEGRATED IN SUBFINS

DEVICE PERFORMANCE TUNING BY DEEP TRENCH VIA (DVB) PROXIMITY EFFECT...

BACKSIDE PROCESSING OF FINS IN FIN BASED TRANSISTOR DEVICES

GATE END CAP AND BOUNDARY PLACEMENT IN TRANSISTOR STRUCTURES FOR N-...

NANORIBBON SUB-FIN ISOLATION BY BACKSIDE SI SUBSTRATE REMOVAL ETCH...

SUBSTRATE-LESS SILICON CONTROLLED RECTIFIER (SCR) INTEGRATED CIRCUI...

SUBSTRATE-LESS LATERAL DIODE INTEGRATED CIRCUIT STRUCTURES

SUBSTRATE-LESS NANOWIRE-BASED LATERAL DIODE INTEGRATED CIRCUIT STRU...

SUBSTRATE-LESS DIODE, BIPOLAR AND FEEDTHROUGH INTEGRATED CIRCUIT ST...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES INCLUDING VARACTORS

DYNAMIC MULTI-RESOLUTION PROCESSING FOR VIDEO CLASSIFICATION