Cloves Rinn Cleavelin

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...
- Patent number 9,053,966
- Issue date Jun 9, 2015
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,872,220
- Issue date Oct 28, 2014
- Texas Instruments Incorporated
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI MuGFETs having single gate electrode level
- Patent number 8,581,317
- Issue date Nov 12, 2013
- Texas Instruments Incorporated
- Howard Tigelaar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...
- Patent number 8,410,519
- Issue date Apr 2, 2013
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming integrated circuits with aligned (100) NMOS and...
- Patent number 8,138,035
- Issue date Mar 20, 2012
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with memory cell including MuGFET and FIN capacitor
- Patent number 8,067,792
- Issue date Nov 29, 2011
- Texas Instruments Incorporated
- Weize Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple-gate MOSFET device and associated manufacturing methods
- Patent number 7,960,234
- Issue date Jun 14, 2011
- Texas Instruments Incorporated
- Craig Henry Huffman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of adjusting FDSOI threshold voltage through oxide charges g...
- Patent number 7,939,393
- Issue date May 10, 2011
- Texas Instruments Incorporated
- Weize Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making (100) NMOS and (110) PMOS sidewall surface on the...
- Patent number 7,897,994
- Issue date Mar 1, 2011
- Texas Instruments Incorporated
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for increasing the extent of built-in self-testin...
- Patent number 7,793,186
- Issue date Sep 7, 2010
- Texas Instruments Incorporated
- Cloves R. Cleavelin
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for increasing the extent of built-in self-testin...
- Patent number 7,752,518
- Issue date Jul 6, 2010
- Texas Instruments Incorporated
- Cloves R. Cleavelin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with memory cell including MuGFET and fin capacitor
- Patent number 7,683,417
- Issue date Mar 23, 2010
- Texas Instruments Incorporated
- Weize Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrating high performance and low power multi-gate devices
- Patent number 7,638,843
- Issue date Dec 29, 2009
- Texas Instruments Incorporated
- Weize W. Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and devices employing metal layers in gates to introduce ch...
- Patent number 7,531,398
- Issue date May 12, 2009
- Texas Instruments Incorporated
- Zhibo Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for dopant containment
- Patent number 7,122,442
- Issue date Oct 17, 2006
- Texas Instruments Incorporated
- Cloves Rinn Cleavelin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for detecting tornadoes
- Patent number 6,097,296
- Issue date Aug 1, 2000
- Santos Garza
- G01 - MEASURING TESTING
Information Patent Grant
Forming an antireflective coating for VLSI metallization
- Patent number 4,839,010
- Issue date Jun 13, 1989
- Texas Instruments Incorporated
- Cloves R. Cleavelin
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20150014789
- Publication date Jan 15, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20140035057
- Publication date Feb 6, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...
- Publication number 20120175710
- Publication date Jul 12, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...
- Publication number 20110151651
- Publication date Jun 23, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- G11 - INFORMATION STORAGE
Information Patent Application
System and Method for Increasing the Extent of Built-In Self-Testin...
- Publication number 20100229056
- Publication date Sep 9, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Cloves R. Cleavelin
- G11 - INFORMATION STORAGE
Information Patent Application
SOI MUGFETS HAVING SINGLE GATE ELECTRODE LEVEL
- Publication number 20100052025
- Publication date Mar 4, 2010
- Texas Instruments Inc.
- Howard Lee Tigelaar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory Device with Memory Cell Including MuGFET and FIN Capacitor
- Publication number 20100002494
- Publication date Jan 7, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF ADJUSTING FDSOI THRESHOLD VOLTAGE THROUGH OXIDE CHARGES G...
- Publication number 20090253253
- Publication date Oct 8, 2009
- Weize XIONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and Method for Increasing the Extent of Built-In Self-Testin...
- Publication number 20090204861
- Publication date Aug 13, 2009
- Cloves R. Cleavelin
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MEMORY CELL INCLUDING MUGFET AND FIN CAPACITOR
- Publication number 20090108316
- Publication date Apr 30, 2009
- Weize Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF MAKING (100) NMOS AND (110) PMOS SIDEWALL SURFACE ON THE...
- Publication number 20080308847
- Publication date Dec 18, 2008
- Weize XIONG
- G11 - INFORMATION STORAGE
Information Patent Application
VARYING MUGFET WIDTH TO ADJUST DEVICE CHARACTERISTICS
- Publication number 20080303095
- Publication date Dec 11, 2008
- Weize Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATING STRAIN ENGINEERING TO MAXIMIZE SYSTEM-ON-A-CHIP PERFORM...
- Publication number 20080290414
- Publication date Nov 27, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Weize Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple-gate MOSFET device and associated manufacturing methods
- Publication number 20080233697
- Publication date Sep 25, 2008
- Texas Instruments Inc.
- Craig Henry Huffman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and devices employing metal layers in gates to introduce ch...
- Publication number 20080096338
- Publication date Apr 24, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Zhibo Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATING HIGH PERFORMANCE AND LOW POWER MULTI-GATE DEVICES
- Publication number 20070259501
- Publication date Nov 8, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATING HIGH PERFORMANCE AND LOW POWER MULTI-GATE DEVICES
- Publication number 20070257319
- Publication date Nov 8, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Weize W. Xiong
- H01 - BASIC ELECTRIC ELEMENTS

Cloves Rinn Cleavelin

Person

Patents Grantslast 30 patents

Integrated circuits with aligned (100) NMOS and (110) PMOS finFET s...

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

SOI MuGFETs having single gate electrode level

Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET s...

Method for forming integrated circuits with aligned (100) NMOS and...

Memory device with memory cell including MuGFET and FIN capacitor

Multiple-gate MOSFET device and associated manufacturing methods

Method of adjusting FDSOI threshold voltage through oxide charges g...

Method of making (100) NMOS and (110) PMOS sidewall surface on the...

System and method for increasing the extent of built-in self-testin...

System and method for increasing the extent of built-in self-testin...

Memory device with memory cell including MuGFET and fin capacitor

Integrating high performance and low power multi-gate devices

Methods and devices employing metal layers in gates to introduce ch...

Method and system for dopant containment

Apparatus and method for detecting tornadoes

Forming an antireflective coating for VLSI metallization

Patents Applicationslast 30 patents

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND (110) PMOS FINFET S...

METHOD FOR FORMING INTEGRATED CIRCUITS WITH ALIGNED (100) NMOS AND...

System and Method for Increasing the Extent of Built-In Self-Testin...

SOI MUGFETS HAVING SINGLE GATE ELECTRODE LEVEL

Memory Device with Memory Cell Including MuGFET and FIN Capacitor

METHOD OF ADJUSTING FDSOI THRESHOLD VOLTAGE THROUGH OXIDE CHARGES G...

System and Method for Increasing the Extent of Built-In Self-Testin...

MEMORY DEVICE WITH MEMORY CELL INCLUDING MUGFET AND FIN CAPACITOR

METHOD OF MAKING (100) NMOS AND (110) PMOS SIDEWALL SURFACE ON THE...

VARYING MUGFET WIDTH TO ADJUST DEVICE CHARACTERISTICS

INTEGRATING STRAIN ENGINEERING TO MAXIMIZE SYSTEM-ON-A-CHIP PERFORM...

Multiple-gate MOSFET device and associated manufacturing methods

Methods and devices employing metal layers in gates to introduce ch...

INTEGRATING HIGH PERFORMANCE AND LOW POWER MULTI-GATE DEVICES

INTEGRATING HIGH PERFORMANCE AND LOW POWER MULTI-GATE DEVICES