Colin S. Bill

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
PUF latch for OTP memory arrays and method of operation
- Patent number 10,714,199
- Issue date Jul 14, 2020
- Synopsys, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
MTP-Thyristor memory cell circuits and methods of operation
- Patent number 10,366,736
- Issue date Jul 30, 2019
- Synopsys, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection circuit for integrated circuit die-let after scribe cut
- Patent number 10,269,789
- Issue date Apr 23, 2019
- Synopsys, Inc.
- Colin Stewart Bill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low power voltage level shifter circuit
- Patent number 10,103,732
- Issue date Oct 16, 2018
- Synopsys, Inc.
- Colin Stewart Bill
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
MTP-thyristor memory cell circuits and methods of operation
- Patent number 9,761,295
- Issue date Sep 12, 2017
- Kilopass Technology, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced power read sensing for one-time programmable memories
- Patent number 9,548,131
- Issue date Jan 17, 2017
- Kilopass Technology, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial local self boosting for NAND
- Patent number 9,514,824
- Issue date Dec 6, 2016
- Cypress Semiconductor Corporation
- Ya-Fen Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
MTP-thyristor memory cell circuits and methods of operation
- Patent number 9,484,068
- Issue date Nov 1, 2016
- Kilopass Technology, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial local self boosting for NAND
- Patent number 8,638,609
- Issue date Jan 28, 2014
- Spansion LLC
- Ya-Fen Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of providing an erase activation energy of a memory device
- Patent number 8,098,521
- Issue date Jan 17, 2012
- Spansion LLC
- Michael A. VanBuskirk
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Methods of programming and erasing resistive memory devices
- Patent number 7,894,243
- Issue date Feb 22, 2011
- Spansion LLC
- Michael VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device and methods of using
- Patent number 7,791,947
- Issue date Sep 7, 2010
- Spansion LLC
- Michael A. VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable breakdown characteristic diode
- Patent number 7,579,631
- Issue date Aug 25, 2009
- Spansion LLC
- David Gaun
- G11 - INFORMATION STORAGE
Information Patent Grant
Using organic semiconductor memory in conjunction with a MEMS actua...
- Patent number 7,499,309
- Issue date Mar 3, 2009
- Spansion LLC
- Colin Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of periodic refresh in medium retention memory arrays
- Patent number 7,474,579
- Issue date Jan 6, 2009
- Spansion LLC
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Utilization of memory-diode which may have each of a plurality of d...
- Patent number 7,450,416
- Issue date Nov 11, 2008
- Spansion LLC
- Swaroop Kaza
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory erase management system
- Patent number 7,443,712
- Issue date Oct 28, 2008
- Spansion LLC
- Colin Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Control of memory devices possessing variable resistance characteri...
- Patent number 7,443,710
- Issue date Oct 28, 2008
- Spansion, LLC
- Tzu-Ning Fang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming, reading and erasing memory-diode in a memory...
- Patent number 7,379,317
- Issue date May 27, 2008
- Spansion LLC
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming, erasing and reading memory cells in a resist...
- Patent number 7,355,886
- Issue date Apr 8, 2008
- Spansion LLC
- Wei Daisy Cai
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory device with improved data retention
- Patent number 7,286,388
- Issue date Oct 23, 2007
- Spansion LLC
- An Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable density and variable persistent organic memory devices, me...
- Patent number 7,273,766
- Issue date Sep 25, 2007
- Spansion LLC
- Zhida Lan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and methods of using and making the device
- Patent number 7,259,039
- Issue date Aug 21, 2007
- Spansion LLC
- Zhida Lan
- G11 - INFORMATION STORAGE
Information Patent Grant
Page buffer architecture for programming, erasing and reading nanos...
- Patent number 7,259,983
- Issue date Aug 21, 2007
- Spansion LLC
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Temperature compensation of thin film diode voltage threshold in me...
- Patent number 7,145,824
- Issue date Dec 5, 2006
- Spansion LLC
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture for generating adaptive arbitrary waveforms
- Patent number 7,072,781
- Issue date Jul 4, 2006
- Advanced Micro Devices, Inc.
- Eugen Gershon
- G11 - INFORMATION STORAGE
Information Patent Grant
Diode array architecture for addressing nanoscale resistive memory...
- Patent number 7,035,141
- Issue date Apr 25, 2006
- Spansion LLC
- Nicholas H. Tripsas
- G11 - INFORMATION STORAGE
Information Patent Grant
Diagnostic mode for testing functionality of BIST (built-in-self-te...
- Patent number 7,028,240
- Issue date Apr 11, 2006
- Advanced Micro Devices, Inc.
- Edward V. Bautista, Jr.
- G11 - INFORMATION STORAGE
Information Patent Grant
Address sequencer within BIST (Built-in-Self-Test) system
- Patent number 7,010,736
- Issue date Mar 7, 2006
- Advanced Micro Devices, Inc.
- Boon Tang Teh
- G11 - INFORMATION STORAGE
Information Patent Grant
Erasing and programming an organic memory device and method of fabr...
- Patent number 6,960,783
- Issue date Nov 1, 2005
- Advanced Micro Devices, Inc.
- Zhida Lan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MTP-Thyristor Memory Cell Circuits and Methods of Operation
- Publication number 20180130514
- Publication date May 10, 2018
- Kilopass Technology, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Application
Protection Circuit for Integrated Circuit Die-Let After Scribe Cut
- Publication number 20180096987
- Publication date Apr 5, 2018
- Kilopass Technology, Inc.
- Colin Stewart Bill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reduced Power Read Sensing for One-Time Programmable Memories
- Publication number 20170025186
- Publication date Jan 26, 2017
- Kilopass Technology, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Application
MTP-Thyristor Memory Cell Circuits and Methods of Operation
- Publication number 20170018299
- Publication date Jan 19, 2017
- Kilopass Technology, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Application
MTP-Thyristor Memory Cell Circuits and Methods of Operation
- Publication number 20160240228
- Publication date Aug 18, 2016
- Kilopass Technology, Inc.
- Colin Stewart Bill
- G11 - INFORMATION STORAGE
Information Patent Application
PARTIAL LOCAL SELF BOOSTING FOR NAND
- Publication number 20140104957
- Publication date Apr 17, 2014
- SPANSION LLC
- Ya-Fen LIN
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMORY DEVICE
- Publication number 20120092924
- Publication date Apr 19, 2012
- Michael A. VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Application
PARTIAL LOCAL SELF BOOSTING FOR NAND
- Publication number 20110286276
- Publication date Nov 24, 2011
- Ya-Fen LIN
- G11 - INFORMATION STORAGE
Information Patent Application
PARTIAL LOCAL SELF-BOOSTING OF A MEMORY CELL CHANNEL
- Publication number 20100238731
- Publication date Sep 23, 2010
- Youseok Suh
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY DEVICE AND METHODS OF USING
- Publication number 20090180330
- Publication date Jul 16, 2009
- SPAINSION LLC
- Michael A. VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Application
USE OF PERIODIC REFRESH IN MEDIUM RETENTION MEMORY ARRAYS
- Publication number 20080151669
- Publication date Jun 26, 2008
- SPANSION LLC
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Application
Methods of programming and erasing resistive memory devices
- Publication number 20080130381
- Publication date Jun 5, 2008
- Spansion LLC
- Michael VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ERASE MANAGEMENT SYSTEM
- Publication number 20080062739
- Publication date Mar 13, 2008
- SPANSION LLC
- Colin Bill
- G11 - INFORMATION STORAGE
Information Patent Application
Program/erase waveshaping control to increase data retention of a m...
- Publication number 20070025166
- Publication date Feb 1, 2007
- SPANSION LLC
- Tzu-Ning Fang
- G11 - INFORMATION STORAGE
Information Patent Application
Page buffer architecture for programming, erasing and reading nanos...
- Publication number 20060268595
- Publication date Nov 30, 2006
- Spansion LLC
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Application
Write-once read-many times memory
- Publication number 20060221713
- Publication date Oct 5, 2006
- Spansion LLC
- Michael A. VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Application
Variable breakdown characteristic diode
- Publication number 20060214183
- Publication date Sep 28, 2006
- Spansion LLC
- David Gaun
- G11 - INFORMATION STORAGE
Information Patent Application
Temperature compensation of thin film diode voltage threshold in me...
- Publication number 20060215439
- Publication date Sep 28, 2006
- Spansion LLC
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Application
Method of programming, reading and erasing memory-diode in a memory...
- Publication number 20060139994
- Publication date Jun 29, 2006
- Colin S. Bill
- G11 - INFORMATION STORAGE
Information Patent Application
Polymer-based transistor devices, methods, and systems
- Publication number 20060113524
- Publication date Jun 1, 2006
- Colin Bill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIODE ARRAY ARCHITECTURE FOR ADDRESSING NANOSCALE RESISTIVE MEMORY...
- Publication number 20060104111
- Publication date May 18, 2006
- Spansion LLC
- Nicholas H. Tripsas
- G11 - INFORMATION STORAGE
Information Patent Application
Control of memory devices possessing variable resistance characteri...
- Publication number 20060067105
- Publication date Mar 30, 2006
- Advanced Micro Devices, Inc.
- Tzu-Ning Fang
- G11 - INFORMATION STORAGE
Information Patent Application
Vertical JFET as used for selective component in a memory array
- Publication number 20060049435
- Publication date Mar 9, 2006
- SPANSION, LLC
- Colin S. Bill
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory device and methods of using and making the device
- Publication number 20050006643
- Publication date Jan 13, 2005
- Zhida Lan
- G11 - INFORMATION STORAGE
Information Patent Application
Control of memory arrays utilizing zener diode-like devices
- Publication number 20040245522
- Publication date Dec 9, 2004
- Michael A. VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Application
Erasing and programming an organic memory device and methods of ope...
- Publication number 20040227136
- Publication date Nov 18, 2004
- Zhida Lan
- G11 - INFORMATION STORAGE
Information Patent Application
Control of memory arrays utilizing zener diode-like devices
- Publication number 20040084743
- Publication date May 6, 2004
- Michael A. VanBuskirk
- G11 - INFORMATION STORAGE
Information Patent Application
Built-in-self-test (BIST) of flash memory cells and implementation...
- Publication number 20040049724
- Publication date Mar 11, 2004
- Colin Bill
- G11 - INFORMATION STORAGE

Colin S. Bill

Person

Patents Grantslast 30 patents

PUF latch for OTP memory arrays and method of operation

MTP-Thyristor memory cell circuits and methods of operation

Protection circuit for integrated circuit die-let after scribe cut

Low power voltage level shifter circuit

MTP-thyristor memory cell circuits and methods of operation

Reduced power read sensing for one-time programmable memories

Partial local self boosting for NAND

MTP-thyristor memory cell circuits and methods of operation

Partial local self boosting for NAND

Method of providing an erase activation energy of a memory device

Methods of programming and erasing resistive memory devices

Non-volatile memory device and methods of using

Variable breakdown characteristic diode

Using organic semiconductor memory in conjunction with a MEMS actua...

Use of periodic refresh in medium retention memory arrays

Utilization of memory-diode which may have each of a plurality of d...

Memory erase management system

Control of memory devices possessing variable resistance characteri...

Method of programming, reading and erasing memory-diode in a memory...

Method of programming, erasing and reading memory cells in a resist...

Resistive memory device with improved data retention

Variable density and variable persistent organic memory devices, me...

Memory device and methods of using and making the device

Page buffer architecture for programming, erasing and reading nanos...

Temperature compensation of thin film diode voltage threshold in me...

Architecture for generating adaptive arbitrary waveforms

Diode array architecture for addressing nanoscale resistive memory...

Diagnostic mode for testing functionality of BIST (built-in-self-te...

Address sequencer within BIST (Built-in-Self-Test) system

Erasing and programming an organic memory device and method of fabr...

Patents Applicationslast 30 patents

MTP-Thyristor Memory Cell Circuits and Methods of Operation

Protection Circuit for Integrated Circuit Die-Let After Scribe Cut

Reduced Power Read Sensing for One-Time Programmable Memories

MTP-Thyristor Memory Cell Circuits and Methods of Operation

MTP-Thyristor Memory Cell Circuits and Methods of Operation

PARTIAL LOCAL SELF BOOSTING FOR NAND

METHOD OF PROVIDING AN ERASE ACTIVATION ENERGY OF A MEMORY DEVICE

PARTIAL LOCAL SELF BOOSTING FOR NAND

PARTIAL LOCAL SELF-BOOSTING OF A MEMORY CELL CHANNEL

NON-VOLATILE MEMORY DEVICE AND METHODS OF USING

USE OF PERIODIC REFRESH IN MEDIUM RETENTION MEMORY ARRAYS

Methods of programming and erasing resistive memory devices

MEMORY ERASE MANAGEMENT SYSTEM

Program/erase waveshaping control to increase data retention of a m...

Page buffer architecture for programming, erasing and reading nanos...

Write-once read-many times memory

Variable breakdown characteristic diode

Temperature compensation of thin film diode voltage threshold in me...

Method of programming, reading and erasing memory-diode in a memory...

Polymer-based transistor devices, methods, and systems

DIODE ARRAY ARCHITECTURE FOR ADDRESSING NANOSCALE RESISTIVE MEMORY...

Control of memory devices possessing variable resistance characteri...

Vertical JFET as used for selective component in a memory array

Memory device and methods of using and making the device

Control of memory arrays utilizing zener diode-like devices

Erasing and programming an organic memory device and methods of ope...

Control of memory arrays utilizing zener diode-like devices

Built-in-self-test (BIST) of flash memory cells and implementation...