David Douglas Briggs

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Line self protecting multiple output power IC architecture
- Patent number 6,784,493
- Issue date Aug 31, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device which minimizes package-shift effects in integ...
- Patent number 6,750,553
- Issue date Jun 15, 2004
- Texas Instruments Incorporated
- Buddhika J. Abesingha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for improving propagation delay of low voltage to high vo...
- Patent number 6,734,705
- Issue date May 11, 2004
- Texas Instruments Incorporated
- Mark Pulkin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of fabricating integrated system on a chip protection circuit
- Patent number 6,709,900
- Issue date Mar 23, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Distributed power device with dual function minority carrier reduction
- Patent number 6,710,427
- Issue date Mar 23, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for controlling startup of a precharged switch...
- Patent number 6,661,216
- Issue date Dec 9, 2003
- Texas Instruments Incorporated
- David A. Grant
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Method of minimizing package-shift effects in integrated circuits b...
- Patent number 6,432,753
- Issue date Aug 13, 2002
- Texas Instruments Incorporated
- Buddhika J. Abesingha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient NPN turn-on in a high voltage DENMOS transistor for ESD p...
- Patent number 6,140,683
- Issue date Oct 31, 2000
- Texas Instruments Incorporated
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiplexing a single output node with multiple output circuits wit...
- Patent number 6,087,852
- Issue date Jul 11, 2000
- Texas Instruments Incorporated
- David D. Briggs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of making an efficient NPN turn-on in a high voltage DENMOS...
- Patent number 6,071,768
- Issue date Jun 6, 2000
- Texas Instruments Incorporated
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral DMOS design for ESD protection
- Patent number 6,064,249
- Issue date May 16, 2000
- Texas Instruments Incorporated
- Charvaka Duvvury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Signal driver circuit operable to control signal rise and fall times
- Patent number 5,537,067
- Issue date Jul 16, 1996
- Texas Instruments Incorporated
- Fernando D. Carvajal
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
In line self protecting multiple output power IC architecture
- Publication number 20030228729
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED SYSTEM ON A CHIP PROTECTION CIRCUIT
- Publication number 20030228721
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF BUILDING A DISTRIBUTED POWER DEVICE WITH DUAL FUNCTION MI...
- Publication number 20030227070
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Technique for improving propagation delay of low voltage to high vo...
- Publication number 20030042536
- Publication date Mar 6, 2003
- Mark Pulkin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method of minimizing package-shift effects in integrated circuits b...
- Publication number 20020182780
- Publication date Dec 5, 2002
- Buddhika J. Abesingha
- H01 - BASIC ELECTRIC ELEMENTS

David Douglas Briggs

Person

Patents Grantslast 30 patents

Line self protecting multiple output power IC architecture

Semiconductor device which minimizes package-shift effects in integ...

Technique for improving propagation delay of low voltage to high vo...

Method of fabricating integrated system on a chip protection circuit

Distributed power device with dual function minority carrier reduction

Apparatus and method for controlling startup of a precharged switch...

Method of minimizing package-shift effects in integrated circuits b...

Efficient NPN turn-on in a high voltage DENMOS transistor for ESD p...

Multiplexing a single output node with multiple output circuits wit...

Method of making an efficient NPN turn-on in a high voltage DENMOS...

Lateral DMOS design for ESD protection

Signal driver circuit operable to control signal rise and fall times

Patents Applicationslast 30 patents

In line self protecting multiple output power IC architecture

INTEGRATED SYSTEM ON A CHIP PROTECTION CIRCUIT

METHOD OF BUILDING A DISTRIBUTED POWER DEVICE WITH DUAL FUNCTION MI...

Technique for improving propagation delay of low voltage to high vo...

Method of minimizing package-shift effects in integrated circuits b...