Feng Zhang

Person

Hillsboro, OR, US

People

Patents Applicationslast 30 patents

Information Patent Application
PERFORMANCE OPTIMIZATION OF TRANSISTORS SHARING CHANNEL STRUCTURES...
- Publication number 20250006734
- Publication date Jan 2, 2025
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ROUNDED NANORIBBONS WITH REGROWN CAPS
- Publication number 20240321962
- Publication date Sep 26, 2024
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE WITH REDUCED N-P BOUNDARY EFFECT
- Publication number 20240321887
- Publication date Sep 26, 2024
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE WITH PERFORMANCE-ENHANCING LAYOUT
- Publication number 20240321859
- Publication date Sep 26, 2024
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LONG CHANNEL FIN TRANSISTORS IN NANORIBBON-BASED DEVICES
- Publication number 20240321987
- Publication date Sep 26, 2024
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICE WITH BACKSIDE FIN TRIM ISOLATION
- Publication number 20240304619
- Publication date Sep 12, 2024
- Guowei Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF NANORIBBON-BASED TRANSISTORS USING PATTERNED FOUNDATION
- Publication number 20240304621
- Publication date Sep 12, 2024
- Intel Corporation
- Chiao-Ti Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL GATE FABRICATION FOR NANORIBBON-BASED TRANSISTORS
- Publication number 20240290788
- Publication date Aug 29, 2024
- Intel Corporation
- Guowei Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR WITH CHANNEL MATERIAL IN A STACK WITH INSULATOR MATERIAL...
- Publication number 20240222484
- Publication date Jul 4, 2024
- Intel Corporation
- Chia-Ching Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE WITH RECESSED TRENCH CONTACT AND DEEP...
- Publication number 20240178101
- Publication date May 30, 2024
- Intel Corporation
- Tao CHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NECKED RIBBON FOR BETTER N WORKFUNCTION FILLING AND DEVICE PERFORMANCE
- Publication number 20240105770
- Publication date Mar 28, 2024
- Intel Corporation
- Tao CHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT DEVICES WITH PROTECTION LINER BETWEEN DOPED SEMI...
- Publication number 20240105718
- Publication date Mar 28, 2024
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BARRIER LAYER FOR DIELECTRIC RECESS MITIGATION
- Publication number 20240088217
- Publication date Mar 14, 2024
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIAL REGIONS EXTENDING BETWEEN INNER GATE SPACERS
- Publication number 20240088265
- Publication date Mar 14, 2024
- Intel Corporation
- Tao Chu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN TRIM PLUG STRUCTURES WITH METAL FOR IMPARTING CHANNEL STRESS
- Publication number 20240088292
- Publication date Mar 14, 2024
- Intel Corporation
- Tao CHU
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Applicationslast 30 patents

PERFORMANCE OPTIMIZATION OF TRANSISTORS SHARING CHANNEL STRUCTURES...

ROUNDED NANORIBBONS WITH REGROWN CAPS

INTEGRATED CIRCUIT DEVICE WITH REDUCED N-P BOUNDARY EFFECT

INTEGRATED CIRCUIT DEVICE WITH PERFORMANCE-ENHANCING LAYOUT

LONG CHANNEL FIN TRANSISTORS IN NANORIBBON-BASED DEVICES

INTEGRATED CIRCUIT DEVICE WITH BACKSIDE FIN TRIM ISOLATION

FABRICATION OF NANORIBBON-BASED TRANSISTORS USING PATTERNED FOUNDATION

METAL GATE FABRICATION FOR NANORIBBON-BASED TRANSISTORS

TRANSISTOR WITH CHANNEL MATERIAL IN A STACK WITH INSULATOR MATERIAL...

INTEGRATED CIRCUIT STRUCTURE WITH RECESSED TRENCH CONTACT AND DEEP...

NECKED RIBBON FOR BETTER N WORKFUNCTION FILLING AND DEVICE PERFORMANCE

INTEGRATED CIRCUIT DEVICES WITH PROTECTION LINER BETWEEN DOPED SEMI...

BARRIER LAYER FOR DIELECTRIC RECESS MITIGATION

EPITAXIAL REGIONS EXTENDING BETWEEN INNER GATE SPACERS

FIN TRIM PLUG STRUCTURES WITH METAL FOR IMPARTING CHANNEL STRESS