Gary F. Derbenwick

Person

Colorado Springs, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated multilevel memory apparatus and method of operating same
- Patent number 11,626,144
- Issue date Apr 11, 2023
- Daryl G Dietrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory device and method of operating same
- Patent number 10,998,030
- Issue date May 4, 2021
- Daryl G Dietrich
- G11 - INFORMATION STORAGE
Information Patent Grant
Rectifier utilizing a grounded antenna
- Patent number 7,109,934
- Issue date Sep 19, 2006
- Celis Semiconductor Corp.
- Alan D. Devilbiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for producing an electrical circuit
- Patent number 7,078,304
- Issue date Jul 18, 2006
- Celis Semiconductor Corporation
- Gary F. Derbenwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encapsulated ferroelectric array
- Patent number 7,053,433
- Issue date May 30, 2006
- Celis Semiconductor Corp.
- Gary F. Derbenwick
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing an electrical circuit
- Patent number 6,900,536
- Issue date May 31, 2005
- Celis Semiconductor Corporation
- Gary F. Derbenwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rectifier utilizing a grounded antenna
- Patent number 6,777,829
- Issue date Aug 17, 2004
- Celis Semiconductor Corporation
- Alan D. Devilbiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for testing ferroelectric memories
- Patent number 6,658,608
- Issue date Dec 2, 2003
- David A. Kamp
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic memory with disturb prevention function
- Patent number 6,201,731
- Issue date Mar 13, 2001
- Celis Semiconductor Corporation
- David A. Kamp
- G11 - INFORMATION STORAGE
Information Patent Grant
Asynchronously addressable clocked memory device and method of oper...
- Patent number 6,178,138
- Issue date Jan 23, 2001
- Celis Semiconductor Corporation
- Gary F. Derbenwick
- G11 - INFORMATION STORAGE
Information Patent Grant
Ferroelectric memory with increased switching voltage
- Patent number 6,031,754
- Issue date Feb 29, 2000
- Celis Semiconductor Corporation
- Gary F. Derbenwick
- G11 - INFORMATION STORAGE
Information Patent Grant
Process for fabricating layered superlattice materials and AB0.sub....
- Patent number 5,962,069
- Issue date Oct 5, 1999
- Symetrix Corporation
- Gunther Schindler
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Liquid source formation of thin films using hexamethyl-disilazane
- Patent number 5,849,071
- Issue date Dec 15, 1998
- Symetrix Corporation
- Gary F. Derbenwick
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Liquid source formation of thin films using hexamethyl-disilazane
- Patent number 5,846,597
- Issue date Dec 8, 1998
- Symetrix Corporation
- Gary F. Derbenwick
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Liquid source formation of thin films using hexamethyl-disilazane
- Patent number 5,843,516
- Issue date Dec 1, 1998
- Symetrix Corporation
- Gary F. Derbenwick
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Zero drain overlap and self aligned contact method for MOS devices
- Patent number 4,486,943
- Issue date Dec 11, 1984
- INMOS Corporation
- William D. Ryden
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating self-aligned MOS devices and independently fo...
- Patent number 4,397,077
- Issue date Aug 9, 1983
- INMOS Corporation
- Gary F. Derbenwick
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Integrated Multilevel Memory Apparatus and Method of Operating Same
- Publication number 20230223052
- Publication date Jul 13, 2023
- Daryl G. Dietrich
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Multilevel Memory Apparatus and Method of Operating Same
- Publication number 20230011673
- Publication date Jan 12, 2023
- Daryl G. Dietrich
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Memory Device and Method of Operating Same
- Publication number 20180025766
- Publication date Jan 25, 2018
- Celis Semiconductor Corporation
- Daryl G. Dietrich
- G11 - INFORMATION STORAGE
Information Patent Application
Method for producing an electrical circuit
- Publication number 20050181537
- Publication date Aug 18, 2005
- Gary F. Derbenwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rectifier utilizing a grounded antenna
- Publication number 20040245858
- Publication date Dec 9, 2004
- Alan D. DeVilbiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rectifier utilizing a grounded antenna
- Publication number 20040233591
- Publication date Nov 25, 2004
- Alan D. DeVilbiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rectifier utilizing a grounded antenna
- Publication number 20030184163
- Publication date Oct 2, 2003
- Alan D. DeVilbiss
- G06 - COMPUTING CALCULATING COUNTING

Gary F. Derbenwick

Person

Patents Grantslast 30 patents

Integrated multilevel memory apparatus and method of operating same

Integrated memory device and method of operating same

Rectifier utilizing a grounded antenna

Method for producing an electrical circuit

Encapsulated ferroelectric array

Method for producing an electrical circuit

Rectifier utilizing a grounded antenna

Apparatus and method for testing ferroelectric memories

Electronic memory with disturb prevention function

Asynchronously addressable clocked memory device and method of oper...

Ferroelectric memory with increased switching voltage

Process for fabricating layered superlattice materials and AB0.sub....

Liquid source formation of thin films using hexamethyl-disilazane

Liquid source formation of thin films using hexamethyl-disilazane

Liquid source formation of thin films using hexamethyl-disilazane

Zero drain overlap and self aligned contact method for MOS devices

Method of fabricating self-aligned MOS devices and independently fo...

Patents Applicationslast 30 patents

Integrated Multilevel Memory Apparatus and Method of Operating Same

Integrated Multilevel Memory Apparatus and Method of Operating Same

Integrated Memory Device and Method of Operating Same

Method for producing an electrical circuit

Rectifier utilizing a grounded antenna

Rectifier utilizing a grounded antenna

Rectifier utilizing a grounded antenna