Gerhard Mueller

Person

Meitingen, DE, US

People

Patents Grantslast 30 patents

Information Patent Grant
Synchronized data capturing circuits using reduced voltage levels a...
- Patent number 6,668,031
- Issue date Dec 23, 2003
- Infineon Technologies AG
- David Russell Hanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell for plateline sensing
- Patent number 6,593,613
- Issue date Jul 15, 2003
- Infineon Technologies AG
- Johann Alsmeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Prefetch architectures for data and time signals in an integrated c...
- Patent number 6,529,054
- Issue date Mar 4, 2003
- Infineon Technologies AG
- David Russell Hanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of reducing sub-threshold leakage in circuits during standby...
- Patent number 6,522,171
- Issue date Feb 18, 2003
- International Business Machines Corporation
- David R. Hanson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier
- Patent number 6,420,908
- Issue date Jul 16, 2002
- Infineon Technologies AG
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having asymmetric column addressing and twiste...
- Patent number 6,370,055
- Issue date Apr 9, 2002
- Infineon Technologies AG
- David Hanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Mixed swing voltage repeaters for high resistance or high capacitan...
- Patent number 6,359,471
- Issue date Mar 19, 2002
- Infineon Technologies North America Corp.
- Gerhard Mueller
- B24 - GRINDING POLISHING
Information Patent Grant
Method and apparatus for the replacement of non-operational metal l...
- Patent number 6,335,652
- Issue date Jan 1, 2002
- International Business Machines Corporation
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing impact of coupling noise in multi-level bitline architecture
- Patent number 6,327,170
- Issue date Dec 4, 2001
- Infineon Technologies AG
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced impact from coupling noise in diagonal bitline architectures
- Patent number 6,320,780
- Issue date Nov 20, 2001
- Infineon Technologies North America Corp.
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Full swing voltage input/full swing output bi-directional repeaters...
- Patent number 6,313,663
- Issue date Nov 6, 2001
- Infineon Technologies AG
- Gerhard Mueller
- B24 - GRINDING POLISHING
Information Patent Grant
Reduced voltage input/reduced voltage output repeaters for high cap...
- Patent number 6,307,397
- Issue date Oct 23, 2001
- InfineonTechnologies AG
- Gerhard Mueller
- B24 - GRINDING POLISHING
Information Patent Grant
Locally folded split level bitline wiring
- Patent number 6,291,335
- Issue date Sep 18, 2001
- Infineon Technologies AG
- Rainer Florian Schnabel
- G11 - INFORMATION STORAGE
Information Patent Grant
Prefetch write driver for a random access memory
- Patent number 6,292,402
- Issue date Sep 18, 2001
- International Business Machines Corporation
- David R. Hanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with programmable bitline multiplexers
- Patent number 6,272,062
- Issue date Aug 7, 2001
- Infineon Technologies AG
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for the replacement of non-operational metal l...
- Patent number 6,259,309
- Issue date Jul 10, 2001
- International Business Machines Corporation
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
SDRAM with a maskable input
- Patent number 6,240,043
- Issue date May 29, 2001
- International Business Machines Corporation
- David R. Hanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitive coupled driver circuit
- Patent number 6,215,349
- Issue date Apr 10, 2001
- International Business Machines Corp.
- David Russell Hanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Sensing of memory cell via a plateline
- Patent number 6,201,730
- Issue date Mar 13, 2001
- Infineon Technologies North America Corp.
- Johann Alsmeier
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit configuration for generating an internal supply voltage
- Patent number 6,194,953
- Issue date Feb 27, 2001
- Infineon Technologies AG
- Gerhard Mueller
- G05 - CONTROLLING REGULATING
Information Patent Grant
Reducing impact of coupling noise
- Patent number 6,188,598
- Issue date Feb 13, 2001
- Infineon Technologies North America Corp.
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced voltage input/reduced voltage output tri-state buffers
- Patent number 6,181,165
- Issue date Jan 30, 2001
- Siemens Aktiengesellschaft
- David R. Hanson
- B24 - GRINDING POLISHING
Information Patent Grant
Dynamic-latch-receiver with self-reset pointer
- Patent number 6,140,855
- Issue date Oct 31, 2000
- International Business Machines Corporation
- Toshiaki Kirihata
- G11 - INFORMATION STORAGE
Information Patent Grant
Driver circuit with negative lower power rail
- Patent number 6,127,878
- Issue date Oct 3, 2000
- Siemens Aktiengesellschaft
- David R. Hanson
- G11 - INFORMATION STORAGE
Information Patent Grant
Hierarchical prefetch for semiconductor memories
- Patent number 6,081,479
- Issue date Jun 27, 2000
- Infineon Technologies North America Corp.
- Brian Ji
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having hierarchical bit line and/or word line...
- Patent number 6,069,815
- Issue date May 30, 2000
- Siemens Aktiengesellschaft
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Space-efficient semiconductor memory having hierarchical column sel...
- Patent number 5,923,605
- Issue date Jul 13, 1999
- Siemens Aktiengesellschaft
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having hierarchical bit line architecture with...
- Patent number 5,917,744
- Issue date Jun 29, 1999
- Siemens Aktiengesellschaft
- Toshiaki Kirihata
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory circuit and methods therefor
- Patent number 5,909,388
- Issue date Jun 1, 1999
- Siemens Aktiengesellschaft
- Gerhard Mueller
- G11 - INFORMATION STORAGE
Information Patent Grant
Space-efficient MDQ switch placement
- Patent number 5,877,994
- Issue date Mar 2, 1999
- Siemens Aktiengesellschaft
- Gerhard Mueller
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Multi-level conductive lines with reduced pitch
- Publication number 20030210103
- Publication date Nov 13, 2003
- Young-Jin Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SENSE AMPLIFIER
- Publication number 20020000839
- Publication date Jan 3, 2002
- GERHARD MUELLER
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for the replacement of non-operational metal l...
- Publication number 20010002112
- Publication date May 31, 2001
- Gerhard Mueller
- H01 - BASIC ELECTRIC ELEMENTS

Gerhard Mueller

Person

Patents Grantslast 30 patents

Synchronized data capturing circuits using reduced voltage levels a...

Memory cell for plateline sensing

Prefetch architectures for data and time signals in an integrated c...

Method of reducing sub-threshold leakage in circuits during standby...

Sense amplifier

Semiconductor memory having asymmetric column addressing and twiste...

Mixed swing voltage repeaters for high resistance or high capacitan...

Method and apparatus for the replacement of non-operational metal l...

Reducing impact of coupling noise in multi-level bitline architecture

Reduced impact from coupling noise in diagonal bitline architectures

Full swing voltage input/full swing output bi-directional repeaters...

Reduced voltage input/reduced voltage output repeaters for high cap...

Locally folded split level bitline wiring

Prefetch write driver for a random access memory

Semiconductor memory with programmable bitline multiplexers

Method and apparatus for the replacement of non-operational metal l...

SDRAM with a maskable input

Capacitive coupled driver circuit

Sensing of memory cell via a plateline

Circuit configuration for generating an internal supply voltage

Reducing impact of coupling noise

Reduced voltage input/reduced voltage output tri-state buffers

Dynamic-latch-receiver with self-reset pointer

Driver circuit with negative lower power rail

Hierarchical prefetch for semiconductor memories

Semiconductor memory having hierarchical bit line and/or word line...

Space-efficient semiconductor memory having hierarchical column sel...

Semiconductor memory having hierarchical bit line architecture with...

Dynamic random access memory circuit and methods therefor

Space-efficient MDQ switch placement

Patents Applicationslast 30 patents

Multi-level conductive lines with reduced pitch

SENSE AMPLIFIER

Method and apparatus for the replacement of non-operational metal l...