Hua Zheng

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data input and output circuits for multi-data rate operation
- Patent number 7,061,941
- Issue date Jun 13, 2006
- Winbond Electronics Corporation America
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing integrated circuit devices
- Patent number 6,930,503
- Issue date Aug 16, 2005
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing integrated circuit devices
- Patent number 6,756,805
- Issue date Jun 29, 2004
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous dynamic random access memory device
- Patent number 6,665,222
- Issue date Dec 16, 2003
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor die pad placement and wire bond
- Patent number 6,653,672
- Issue date Nov 25, 2003
- Winbond Electronics Corp.
- Hua Zheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High speed test system for a memory device
- Patent number 6,550,026
- Issue date Apr 15, 2003
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous dynamic random access memory device
- Patent number 6,512,711
- Issue date Jan 28, 2003
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing integrated circuit devices
- Patent number 6,496,027
- Issue date Dec 17, 2002
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundant circuit for memory device
- Patent number 6,480,428
- Issue date Nov 12, 2002
- Winbond Electronics Corporation
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array architecture supporting block write operation
- Patent number 6,457,094
- Issue date Sep 24, 2002
- Winbond Electronics Corporation
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing high-speed circuits based on slow-...
- Patent number 6,452,843
- Issue date Sep 17, 2002
- Winbond Electronics Corporation
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous dynamic random access memory device
- Patent number 6,373,752
- Issue date Apr 16, 2002
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and a method for configuring pad connections in an integrat...
- Patent number 6,369,599
- Issue date Apr 9, 2002
- Micron Technology, Inc.
- Jeffrey P. Wright
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for storage of test results within an integrat...
- Patent number 6,365,421
- Issue date Apr 2, 2002
- Micron Technology, Inc.
- Brett Debenham
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous dynamic random access memory device
- Patent number 6,351,404
- Issue date Feb 26, 2002
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for controlling the operation of an integrated...
- Patent number 6,310,819
- Issue date Oct 30, 2001
- Micron Technology, Inc.
- Timothy B. Cowles
- G11 - INFORMATION STORAGE
Information Patent Grant
System for improved memory cell access
- Patent number 6,288,952
- Issue date Sep 11, 2001
- Micron Technology, Inc.
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for controlling the operation of an integrated...
- Patent number 6,229,749
- Issue date May 8, 2001
- Micron Technology Inc.
- Timothy B. Cowles
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous dynamic random access memory device
- Patent number 6,215,709
- Issue date Apr 10, 2001
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous dynamic random access memory device
- Patent number 6,212,111
- Issue date Apr 3, 2001
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and a method for configuring pad connections in an integrat...
- Patent number 6,204,072
- Issue date Mar 20, 2001
- Micron Technology Inc.
- Jeffrey P. Wright
- G01 - MEASURING TESTING
Information Patent Grant
Clock-based transparent refresh mechanisms for DRAMS
- Patent number 6,195,303
- Issue date Feb 27, 2001
- Winbond Electronics Corporation
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for storage of test results within an integrat...
- Patent number 6,194,738
- Issue date Feb 27, 2001
- Micron Technology, Inc.
- Brett Debenham
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for storing information in a semiconductor device
- Patent number 6,190,972
- Issue date Feb 20, 2001
- Micron Technology, Inc.
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Low latency memory sensing circuits
- Patent number 6,188,624
- Issue date Feb 13, 2001
- Winbond Electronics Corporation
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous dynamic random access memory device
- Patent number 6,172,935
- Issue date Jan 9, 2001
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array datapath architecture
- Patent number 6,157,560
- Issue date Dec 5, 2000
- Winbond Electronics Corporation
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed test system for a memory device
- Patent number 6,154,860
- Issue date Nov 28, 2000
- Micron Technology, Inc.
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed circuits to turn off word lines in a memory array
- Patent number 6,144,610
- Issue date Nov 7, 2000
- Winbond Electronics Corporation
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for controlling the operation of an integrated...
- Patent number 6,141,290
- Issue date Oct 31, 2000
- Micron Technology, Inc.
- Timothy B. Cowles
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
System for testing integrated circuit devices
- Publication number 20050270058
- Publication date Dec 8, 2005
- Micron Technology, Inc.
- Joseph C. Sher
- G01 - MEASURING TESTING
Information Patent Application
System for testing integrated circuit devices
- Publication number 20040201399
- Publication date Oct 14, 2004
- Micron Technology, Inc.
- Joseph C. Sher
- G01 - MEASURING TESTING
Information Patent Application
Synchronous dynamic random access memory device
- Publication number 20030123320
- Publication date Jul 3, 2003
- Jeffrey P. Wright
- G11 - INFORMATION STORAGE
Information Patent Application
System for testing integrated circuit devices
- Publication number 20030090285
- Publication date May 15, 2003
- Micron Technology, Inc.
- Joseph C. Sher
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for testing high-speed circuits based on slow-...
- Publication number 20020075730
- Publication date Jun 20, 2002
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Application
Redundant circuit for memory device
- Publication number 20020075733
- Publication date Jun 20, 2002
- Hua Zheng
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for storage of test results within an integrat...
- Publication number 20020006676
- Publication date Jan 17, 2002
- Brett Debenham
- G01 - MEASURING TESTING
Information Patent Application
MEMORY ARRAY ARCHITECTURE SUPPORTING BLOCK WRITE OPERATION
- Publication number 20010056519
- Publication date Dec 27, 2001
- HUA ZHENG
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Data input and output circuits for multi-data rate operation

System for testing integrated circuit devices

System for testing integrated circuit devices

Synchronous dynamic random access memory device

Semiconductor die pad placement and wire bond

High speed test system for a memory device

Synchronous dynamic random access memory device

System for testing integrated circuit devices

Redundant circuit for memory device

Memory array architecture supporting block write operation

Method and apparatus for testing high-speed circuits based on slow-...

Synchronous dynamic random access memory device

Circuit and a method for configuring pad connections in an integrat...

Method and apparatus for storage of test results within an integrat...

Synchronous dynamic random access memory device

Method and apparatus for controlling the operation of an integrated...

System for improved memory cell access

Method and apparatus for controlling the operation of an integrated...

Synchronous dynamic random access memory device

Synchronous dynamic random access memory device

Circuit and a method for configuring pad connections in an integrat...

Clock-based transparent refresh mechanisms for DRAMS

Method and apparatus for storage of test results within an integrat...

Method for storing information in a semiconductor device

Low latency memory sensing circuits

Synchronous dynamic random access memory device

Memory array datapath architecture

High-speed test system for a memory device

Distributed circuits to turn off word lines in a memory array

Method and apparatus for controlling the operation of an integrated...

Patents Applicationslast 30 patents

System for testing integrated circuit devices

System for testing integrated circuit devices

Synchronous dynamic random access memory device

System for testing integrated circuit devices

Method and apparatus for testing high-speed circuits based on slow-...

Redundant circuit for memory device

Method and apparatus for storage of test results within an integrat...

MEMORY ARRAY ARCHITECTURE SUPPORTING BLOCK WRITE OPERATION