Jean-Marie Gaultier

Person

Rousset, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Method of communication with coherence checking and device for the...
- Patent number 6,771,716
- Issue date Aug 3, 2004
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of communication with improved acknowledgment of reception
- Patent number 6,647,527
- Issue date Nov 11, 2003
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of controlling an electronic circuit
- Patent number 6,631,848
- Issue date Oct 14, 2003
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for the identification of electronic cards presented in an i...
- Patent number 6,469,618
- Issue date Oct 22, 2002
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of communication with improved acknowledgement of reception
- Patent number 6,393,595
- Issue date May 21, 2002
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for the control of an electronic circuit and control unit fo...
- Patent number 6,347,392
- Issue date Feb 12, 2002
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic card identification methods
- Patent number 6,328,218
- Issue date Dec 11, 2001
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for the identification of electronic cards
- Patent number 6,321,982
- Issue date Nov 27, 2001
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for the incremental reading of a memory
- Patent number 6,178,490
- Issue date Jan 23, 2001
- SGS-Thomson Microelectronics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for the predictive reading of a memory
- Patent number 6,138,220
- Issue date Oct 24, 2000
- SGS-Thomson Microelectronics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic signal output buffer circuit
- Patent number 6,111,426
- Issue date Aug 29, 2000
- SGS-Thomson Microelectronics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with read protected zones
- Patent number 6,002,619
- Issue date Dec 14, 1999
- SGS-Thomson Microelectornics S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read circuit for memory adapted to the measurement of leakage currents
- Patent number 5,889,702
- Issue date Mar 30, 1999
- SGS-Thomson Microelectronics, S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for the selection of redundant memory elements and flash EE...
- Patent number 5,796,653
- Issue date Aug 18, 1998
- SGS-Thomson Microelectronics, S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
EPROM memory with internal signature concerning, in particular, the...
- Patent number 5,680,353
- Issue date Oct 21, 1997
- SGS-Thomson Microelectronics, S.A.
- Jean-Marie Gaultier
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable integrated circuit memory comprising emulation means
- Patent number 5,651,128
- Issue date Jul 22, 1997
- SGS-Thomson Microelectronics, S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrically modifiable non-volatile memory incorporating test func...
- Patent number 5,644,530
- Issue date Jul 1, 1997
- SGS-Thomson Microelectronics, S.A.
- Jean-Marie Bernard Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory device with balancing circuit including f...
- Patent number 5,638,332
- Issue date Jun 10, 1997
- SGS-Thomson Microelectronics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for the erasure of a memory, and circuits for the implementa...
- Patent number 5,619,451
- Issue date Apr 8, 1997
- SGS-Thomson Microelectronics S.A.
- Claude Costabello
- G11 - INFORMATION STORAGE
Information Patent Grant
Matrix device with redundancy fuses for integrated memory
- Patent number 5,594,693
- Issue date Jan 14, 1997
- SGS-Thomson Microelectronics S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory device with balancing circuit including f...
- Patent number 5,581,511
- Issue date Dec 3, 1996
- SGS-Thomson Microelectonics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory device with balancing circuit including f...
- Patent number 5,544,114
- Issue date Aug 6, 1996
- SGS-Thomson Micoroelectronics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Output precharge circuit for memory
- Patent number 5,377,149
- Issue date Dec 27, 1994
- SGS-Thomson Microelectronics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated memory having improved testing means
- Patent number 5,355,341
- Issue date Oct 11, 1994
- SGS-Thomson Microelectronics, S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-charging method for the reading of memories
- Patent number 5,258,955
- Issue date Nov 2, 1993
- SGS-Thomson Microelectronics, S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Device for addressing of redundant elements of an integrated circui...
- Patent number 5,058,069
- Issue date Oct 15, 1991
- Thomson Semiconducteurs
- Jean Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for the testing of one time programmable memories and corres...
- Patent number 5,007,026
- Issue date Apr 9, 1991
- SGS-Thomson Microelectronics S.A.
- Jean-Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Addressing of redundant columns and rows of an integrated circuit m...
- Patent number 4,947,375
- Issue date Aug 7, 1990
- Thomson Semiconducteurs
- Jean Marie Gaultier
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection structure for an integrated circuit
- Patent number 4,897,757
- Issue date Jan 30, 1990
- SGS-Thomson Microelectronics S.A.
- Francois Tailliet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device for neutralizing the access to an integrated-circuit zone to...
- Patent number 4,851,894
- Issue date Jul 25, 1989
- Eurotechnique
- Gerard S. de Ferron
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method of communication with improved acknowledgment of reception
- Publication number 20020095637
- Publication date Jul 18, 2002
- STMicroelectronics S.A.
- Jean-Marie Gaultier
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Jean-Marie Gaultier

Person

Patents Grantslast 30 patents

Method of communication with coherence checking and device for the...

Method of communication with improved acknowledgment of reception

Method of controlling an electronic circuit

Method for the identification of electronic cards presented in an i...

Method of communication with improved acknowledgement of reception

Method for the control of an electronic circuit and control unit fo...

Electronic card identification methods

Method for the identification of electronic cards

Method and device for the incremental reading of a memory

Method and device for the predictive reading of a memory

Logic signal output buffer circuit

Memory with read protected zones

Read circuit for memory adapted to the measurement of leakage currents

Circuit for the selection of redundant memory elements and flash EE...

EPROM memory with internal signature concerning, in particular, the...

Programmable integrated circuit memory comprising emulation means

Electrically modifiable non-volatile memory incorporating test func...

Integrated circuit memory device with balancing circuit including f...

Method for the erasure of a memory, and circuits for the implementa...

Matrix device with redundancy fuses for integrated memory

Integrated circuit memory device with balancing circuit including f...

Integrated circuit memory device with balancing circuit including f...

Output precharge circuit for memory

Integrated memory having improved testing means

Pre-charging method for the reading of memories

Device for addressing of redundant elements of an integrated circui...

Method for the testing of one time programmable memories and corres...

Addressing of redundant columns and rows of an integrated circuit m...

Protection structure for an integrated circuit

Device for neutralizing the access to an integrated-circuit zone to...

Patents Applicationslast 30 patents

Method of communication with improved acknowledgment of reception