Jeffrey B. Smith

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Versatile system for optimizing current gain in bipolar transistor...
- Patent number 7,615,805
- Issue date Nov 10, 2009
- Texas Instruments Incorporated
- Joe R. Trogolo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Versatile system for optimizing current gain in bipolar transistor...
- Patent number 7,226,835
- Issue date Jun 5, 2007
- Texas Instruments Incorporated
- Joe Trogolo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors formed with grid or island implantation masks to form r...
- Patent number 6,869,851
- Issue date Mar 22, 2005
- Texas Instruments Incorporated
- Joe R. Trogolo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors formed with grid or island implantation masks to form r...
- Patent number 6,716,709
- Issue date Apr 6, 2004
- Texas Instruments Incorporated
- Lily Springer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Precipitated silicas, silica gels with and free of deposited carbon...
- Patent number 6,638,354
- Issue date Oct 28, 2003
- Agritec, Inc.
- Douglas K. Stephens
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
LDMOS power device with oversized dwell
- Patent number 6,424,005
- Issue date Jul 23, 2002
- Texas Instruments Incorporated
- Chin-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated NMOS transistor fabricated in a digital BiCMOS process
- Patent number 6,396,109
- Issue date May 28, 2002
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Precipitated silicas, silica gels with and free of deposited carbon...
- Patent number 6,375,735
- Issue date Apr 23, 2002
- Agritec, Inc.
- Douglas K. Stephens
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES
Information Patent Grant
Power transistor with silicided gate and contacts
- Patent number 6,284,669
- Issue date Sep 4, 2001
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with increased operating voltage and method of fabrication
- Patent number 6,153,451
- Issue date Nov 28, 2000
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an isolated NMOS transistor on a digital BiC...
- Patent number 6,033,946
- Issue date Mar 7, 2000
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated vertical PNP transistor and methods for making same in a d...
- Patent number 5,929,506
- Issue date Jul 27, 1999
- Texas Instrument Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making isolated vertical PNP transistor in a digital BiC...
- Patent number 5,880,002
- Issue date Mar 9, 1999
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making an isolated vertical transistor
- Patent number 5,702,959
- Issue date Dec 30, 1997
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabrication of a semiconductor device having high-and low...
- Patent number 5,527,722
- Issue date Jun 18, 1996
- Texas Instruments Incoporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor device having high-and low-volt...
- Patent number 5,472,887
- Issue date Dec 5, 1995
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High voltage merged bipolar/CMOS technology
- Patent number 4,994,887
- Issue date Feb 19, 1991
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT LOGIC EMBEDDED WITHIN IC PROTECTIVE LAYER
- Publication number 20090020313
- Publication date Jan 22, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Yves LEDUC
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Versatile system for optimizing current gain in bipolar transistor...
- Publication number 20070205435
- Publication date Sep 6, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Joe Trogolo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistors formed with grid or island implantation masks to form r...
- Publication number 20040152288
- Publication date Aug 5, 2004
- Joe R. Trogolo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Versatile system for optimizing current gain in bipolar transistor...
- Publication number 20040007716
- Publication date Jan 15, 2004
- Joe Trogolo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Precipitated silicas, silica gels with and free of deposited carbon...
- Publication number 20030097966
- Publication date May 29, 2003
- Agritec, Inc.
- Douglas K. Stephens
- C04 - CEMENTS CONCRETE ARTIFICIAL STONE CERAMICS REFRACTORIES

Jeffrey B. Smith

Person

Patents Grantslast 30 patents

Versatile system for optimizing current gain in bipolar transistor...

Versatile system for optimizing current gain in bipolar transistor...

Transistors formed with grid or island implantation masks to form r...

Transistors formed with grid or island implantation masks to form r...

Precipitated silicas, silica gels with and free of deposited carbon...

LDMOS power device with oversized dwell

Isolated NMOS transistor fabricated in a digital BiCMOS process

Precipitated silicas, silica gels with and free of deposited carbon...

Power transistor with silicided gate and contacts

Transistor with increased operating voltage and method of fabrication

Method for fabricating an isolated NMOS transistor on a digital BiC...

Isolated vertical PNP transistor and methods for making same in a d...

Method for making isolated vertical PNP transistor in a digital BiC...

Method for making an isolated vertical transistor

Method of fabrication of a semiconductor device having high-and low...

Method of fabricating semiconductor device having high-and low-volt...

High voltage merged bipolar/CMOS technology

Patents Applicationslast 30 patents

CIRCUIT LOGIC EMBEDDED WITHIN IC PROTECTIVE LAYER

Versatile system for optimizing current gain in bipolar transistor...

Transistors formed with grid or island implantation masks to form r...

Versatile system for optimizing current gain in bipolar transistor...

Precipitated silicas, silica gels with and free of deposited carbon...