Jiewen Fan

Person

Beijing, CN

People

Patents Grantslast 30 patents

Information Patent Grant
Integration method for a vertical nanowire transistor
- Patent number 9,502,310
- Issue date Nov 22, 2016
- Peking University
- Ming Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating FinFET with separated double gates on bulk s...
- Patent number 9,478,641
- Issue date Oct 25, 2016
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating multiple layers of ultra narrow silicon wires
- Patent number 9,425,060
- Issue date Aug 23, 2016
- Peking University
- Ming Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of adjusting a threshold voltage of a multi-gate structure d...
- Patent number 9,396,949
- Issue date Jul 19, 2016
- Peking University
- Ming Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating multi-gate structure device with source and...
- Patent number 9,356,124
- Issue date May 31, 2016
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating quasi-SOI source/drain field effect transist...
- Patent number 9,349,588
- Issue date May 24, 2016
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programmable array of silicon nanowire field effect transistor and...
- Patent number 9,099,500
- Issue date Aug 4, 2015
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for fabricating silicon nanowire field effect transistor bas...
- Patent number 9,034,702
- Issue date May 19, 2015
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for testing density and location of gate dielectric layer tr...
- Patent number 9,018,968
- Issue date Apr 28, 2015
- Peking University
- Ru Huang
- G01 - MEASURING TESTING
Information Patent Grant
Field effect transistor with a vertical channel and fabrication met...
- Patent number 8,901,644
- Issue date Dec 2, 2014
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for testing trap density of gate dielectric layer in semicon...
- Patent number 8,866,507
- Issue date Oct 21, 2014
- Peking University
- Ru Huang
- G01 - MEASURING TESTING
Information Patent Grant
Method for fabricating semiconductor nano circular ring
- Patent number 8,722,312
- Issue date May 13, 2014
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Fabrication method of vertical silicon nanowire field effect transi...
- Patent number 8,592,276
- Issue date Nov 26, 2013
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
High voltage-resistant lateral double-diffused transistor based on...
- Patent number 8,564,031
- Issue date Oct 22, 2013
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for fabricating surrounding-gate silicon nanowire transistor...
- Patent number 8,563,370
- Issue date Oct 22, 2013
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method for surrounding gate silicon nanowire transistor...
- Patent number 8,513,067
- Issue date Aug 20, 2013
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method for fabricating ultra-fine nanowire
- Patent number 8,372,752
- Issue date Feb 12, 2013
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR PREPARING A NANO-SCALE FIELD-EFFECT TRANSISTOR
- Publication number 20160268384
- Publication date Sep 15, 2016
- Ming Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A QUASI-SOI SOURCE-DRAIN MULTI-GATE DEVICE
- Publication number 20160247726
- Publication date Aug 25, 2016
- PERKING UNIVERSITY
- Ru HUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
- Publication number 20160225851
- Publication date Aug 4, 2016
- Peking University
- Ming Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Fabricating Multiple Layers of Ultra Narrow Silicon Wires
- Publication number 20160181114
- Publication date Jun 23, 2016
- Peking University
- Ming Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING QUASI-SOI SOURCE/DRAIN FIELD EFFECT TRANSIST...
- Publication number 20160118245
- Publication date Apr 28, 2016
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING MULTI-GATE STRUCTURE DEVICE WITH SOURCE AND...
- Publication number 20160064529
- Publication date Mar 3, 2016
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING FINFET WITH SEPARATED DOUBLE GATES ON BULK S...
- Publication number 20150236130
- Publication date Aug 20, 2015
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF ADJUSTING A THRESHOLD VOLTAGE OF A MULTI-GATE STRUCTURE D...
- Publication number 20150206752
- Publication date Jul 23, 2015
- Peking University
- Ming Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING FINFET ON GERMANIUM OR GROUP III-V SEMICONDU...
- Publication number 20150140758
- Publication date May 21, 2015
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TESTING DENSITY AND LOCATION OF GATE DIELECTRIC LAYER TR...
- Publication number 20130214810
- Publication date Aug 22, 2013
- Peking University
- Ru Huang
- G01 - MEASURING TESTING
Information Patent Application
FIELD EFFECT TRANSISTOR WITH A VERTICAL CHANNEL AND FABRICATION MET...
- Publication number 20130168759
- Publication date Jul 4, 2013
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR FABRICATING ULTRA-FINE NANOWIRE
- Publication number 20130130503
- Publication date May 23, 2013
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Application
PROGRAMMABLE ARRAY OF SILICON NANOWIRE FIELD EFFECT TRANSISTOR AND...
- Publication number 20130075701
- Publication date Mar 28, 2013
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Application
FABRICATION METHOD FOR SURROUNDING GATE SILICON NANOWIRE TRANSISTOR...
- Publication number 20130017654
- Publication date Jan 17, 2013
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Application
FABRICATION METHOD OF VERTICAL SILICON NANOWIRE FIELD EFFECT TRANSI...
- Publication number 20130011980
- Publication date Jan 10, 2013
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR FABRICATING SURROUNDING-GATE SILICON NANOWIRE TRANSISTOR...
- Publication number 20120302014
- Publication date Nov 29, 2012
- Peking University
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Fabricating Silicon Nanowire Field Effect Transistor Bas...
- Publication number 20120302027
- Publication date Nov 29, 2012
- Ru Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH VOLTAGE-RESISTANT LATERAL DOUBLE-DIFFUSED TRANSISTOR BASED ON...
- Publication number 20120199808
- Publication date Aug 9, 2012
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR FABRICATING SEMICONDUCTOR NANO CIRCULAR RING
- Publication number 20120190202
- Publication date Jul 26, 2012
- Peking University
- Ru Huang
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR TESTING TRAP DENSITY OF GATE DIELECTRIC LAYER IN SEMICON...
- Publication number 20120187976
- Publication date Jul 26, 2012
- Peking University
- Ru Huang
- G01 - MEASURING TESTING

Person

Patents Grantslast 30 patents

Integration method for a vertical nanowire transistor

Method for fabricating FinFET with separated double gates on bulk s...

Method for fabricating multiple layers of ultra narrow silicon wires

Method of adjusting a threshold voltage of a multi-gate structure d...

Method for fabricating multi-gate structure device with source and...

Method for fabricating quasi-SOI source/drain field effect transist...

Programmable array of silicon nanowire field effect transistor and...

Method for fabricating silicon nanowire field effect transistor bas...

Method for testing density and location of gate dielectric layer tr...

Field effect transistor with a vertical channel and fabrication met...

Method for testing trap density of gate dielectric layer in semicon...

Method for fabricating semiconductor nano circular ring

Fabrication method of vertical silicon nanowire field effect transi...

High voltage-resistant lateral double-diffused transistor based on...

Method for fabricating surrounding-gate silicon nanowire transistor...

Fabrication method for surrounding gate silicon nanowire transistor...

Method for fabricating ultra-fine nanowire

Patents Applicationslast 30 patents

METHOD FOR PREPARING A NANO-SCALE FIELD-EFFECT TRANSISTOR

METHOD FOR FABRICATING A QUASI-SOI SOURCE-DRAIN MULTI-GATE DEVICE

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME

Method for Fabricating Multiple Layers of Ultra Narrow Silicon Wires

METHOD FOR FABRICATING QUASI-SOI SOURCE/DRAIN FIELD EFFECT TRANSIST...

METHOD FOR FABRICATING MULTI-GATE STRUCTURE DEVICE WITH SOURCE AND...

METHOD FOR FABRICATING FINFET WITH SEPARATED DOUBLE GATES ON BULK S...

METHOD OF ADJUSTING A THRESHOLD VOLTAGE OF A MULTI-GATE STRUCTURE D...

METHOD FOR FABRICATING FINFET ON GERMANIUM OR GROUP III-V SEMICONDU...

METHOD FOR TESTING DENSITY AND LOCATION OF GATE DIELECTRIC LAYER TR...

FIELD EFFECT TRANSISTOR WITH A VERTICAL CHANNEL AND FABRICATION MET...

METHOD FOR FABRICATING ULTRA-FINE NANOWIRE

PROGRAMMABLE ARRAY OF SILICON NANOWIRE FIELD EFFECT TRANSISTOR AND...

FABRICATION METHOD FOR SURROUNDING GATE SILICON NANOWIRE TRANSISTOR...

FABRICATION METHOD OF VERTICAL SILICON NANOWIRE FIELD EFFECT TRANSI...

METHOD FOR FABRICATING SURROUNDING-GATE SILICON NANOWIRE TRANSISTOR...

Method for Fabricating Silicon Nanowire Field Effect Transistor Bas...

HIGH VOLTAGE-RESISTANT LATERAL DOUBLE-DIFFUSED TRANSISTOR BASED ON...

METHOD FOR FABRICATING SEMICONDUCTOR NANO CIRCULAR RING

METHOD FOR TESTING TRAP DENSITY OF GATE DIELECTRIC LAYER IN SEMICON...