John S. Guzek

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Embedded die on interposer packages
- Patent number 12,230,582
- Issue date Feb 18, 2025
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized high density substrate routing
- Patent number 12,107,042
- Issue date Oct 1, 2024
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized high density substrate routing
- Patent number 11,984,396
- Issue date May 14, 2024
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded die on interposer packages
- Patent number 11,798,892
- Issue date Oct 24, 2023
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized high density substrate routing
- Patent number 11,515,248
- Issue date Nov 29, 2022
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded semiconductive chips in reconstituted wafers, and systems...
- Patent number 11,257,688
- Issue date Feb 22, 2022
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor die with bumpless die-package interface for...
- Patent number 11,201,128
- Issue date Dec 14, 2021
- Intel Corporation
- Pramod Malatkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded die on interposer packages
- Patent number 10,930,596
- Issue date Feb 23, 2021
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized high density substrate routing
- Patent number 10,796,988
- Issue date Oct 6, 2020
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded semiconductive chips in reconstituted wafers, and systems...
- Patent number 10,651,051
- Issue date May 12, 2020
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having spacer layer
- Patent number 10,636,769
- Issue date Apr 28, 2020
- Intel Corporation
- Weng Hong Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electro-magnetic interference (EMI) shielding techniques and config...
- Patent number 10,595,409
- Issue date Mar 17, 2020
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recessed and embedded die coreless package
- Patent number 10,541,232
- Issue date Jan 21, 2020
- Intel Corporation
- John Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Logic die and other components embedded in build-up layers
- Patent number 10,453,799
- Issue date Oct 22, 2019
- Intel Corporation
- Deepak V. Kulkarni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized high density substrate routing
- Patent number 10,366,951
- Issue date Jul 30, 2019
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package on package architecture and method for making
- Patent number 10,170,409
- Issue date Jan 1, 2019
- Intel Corporation
- Sanka Ganesan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recessed and embedded die coreless package
- Patent number 10,163,863
- Issue date Dec 25, 2018
- Intel Corporation
- John Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having spacer layer
- Patent number 10,083,936
- Issue date Sep 25, 2018
- Intel Corporation
- Weng Hong Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic structures having laminated or embedded glass routi...
- Patent number 10,008,452
- Issue date Jun 26, 2018
- Intel Corporation
- Qing Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic device and method of manufacturing same
- Patent number 9,999,129
- Issue date Jun 12, 2018
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packages including high density bump-less build...
- Patent number 9,941,245
- Issue date Apr 10, 2018
- Intel Corporation
- Oswald Skeete
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded memory and power management subpackage
- Patent number 9,871,026
- Issue date Jan 16, 2018
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package stack
- Patent number 9,859,253
- Issue date Jan 2, 2018
- Intel Corporation
- Saikumar Jayaraman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded semiconductive chips in reconstituted wafers, and systems...
- Patent number 9,847,234
- Issue date Dec 19, 2017
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density interconnection of microelectronic devices
- Patent number 9,842,832
- Issue date Dec 12, 2017
- Intel Corporation
- Omkar G. Karhade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Panel level fabrication of package substrates with integrated stiff...
- Patent number 9,832,860
- Issue date Nov 28, 2017
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flexible electronic assembly method
- Patent number 9,820,384
- Issue date Nov 14, 2017
- Intel Corporation
- Sasha Oster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor package with embedded die and its methods of fabrication
- Patent number 9,780,054
- Issue date Oct 3, 2017
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electro-magnetic interference (EMI) shielding techniques and config...
- Patent number 9,713,255
- Issue date Jul 18, 2017
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an electromagnetic interference shield for semicon...
- Patent number 9,691,711
- Issue date Jun 27, 2017
- Intel Corporation
- Ravindranath V. Mahajan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
EMBEDDED DIE ON INTERPOSER PACKAGES
- Publication number 20250149462
- Publication date May 8, 2025
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED HIGH DENSITY SUBSTRATE ROUTING
- Publication number 20240421073
- Publication date Dec 19, 2024
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED DIE ON INTERPOSER PACKAGES
- Publication number 20240006331
- Publication date Jan 4, 2024
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR...
- Publication number 20230420400
- Publication date Dec 28, 2023
- Intel Corporation
- Pramod MALATKAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED HIGH DENSITY SUBSTRATE ROUTING
- Publication number 20230130944
- Publication date Apr 27, 2023
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED HIGH DENSITY SUBSTRATE ROUTING
- Publication number 20230040850
- Publication date Feb 9, 2023
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...
- Publication number 20220336229
- Publication date Oct 20, 2022
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...
- Publication number 20220172962
- Publication date Jun 2, 2022
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR...
- Publication number 20220068861
- Publication date Mar 3, 2022
- Intel Corporation
- Pramod MALATKAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED DIE ON INTERPOSER PACKAGES
- Publication number 20210134731
- Publication date May 6, 2021
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED HIGH DENSITY SUBSTRATE ROUTING
- Publication number 20200395297
- Publication date Dec 17, 2020
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...
- Publication number 20200273721
- Publication date Aug 27, 2020
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED DIE ON INTERPOSER PACKAGES
- Publication number 20190189564
- Publication date Jun 20, 2019
- Intel Corporation
- John S. Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED AND EMBEDDED DIE CORELESS PACKAGE
- Publication number 20190081023
- Publication date Mar 14, 2019
- Intel Corporation
- John Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE HAVING SPACER LAYER
- Publication number 20190006325
- Publication date Jan 3, 2019
- Intel Corporation
- Weng Hong Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED HIGH DENSITY SUBSTRATE ROUTING
- Publication number 20180350737
- Publication date Dec 6, 2018
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLEXIBLE ELECTRONIC ASSEMBLY METHOD
- Publication number 20180263117
- Publication date Sep 13, 2018
- Intel Corporation
- Sasha N. Oster
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...
- Publication number 20180033648
- Publication date Feb 1, 2018
- Intel Corporation
- Robert L. Sankman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED AND EMBEDDED DIE CORELESS PACKAGE
- Publication number 20180012871
- Publication date Jan 11, 2018
- Intel Corporation
- John Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE STACK
- Publication number 20180005989
- Publication date Jan 4, 2018
- Intel Corporation
- Saikumar Jayaraman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRO-MAGNETIC INTERFERENCE (EMI) SHIELDING TECHNIQUES AND CONFIG...
- Publication number 20170290155
- Publication date Oct 5, 2017
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED HIGH DENSITY SUBSTRATE ROUTING
- Publication number 20170287831
- Publication date Oct 5, 2017
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC STRUCTURES HAVING LAMINATED OR EMBEDDED GLASS ROUTI...
- Publication number 20170200677
- Publication date Jul 13, 2017
- Intel Corporation
- Qing Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED AND EMBEDDED DIE CORELESS PACKAGE
- Publication number 20170125385
- Publication date May 4, 2017
- Intel Corporation
- John Guzek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOGIC DIE AND OTHER COMPONENTS EMBEDDED IN BUILD-UP LAYERS
- Publication number 20170125351
- Publication date May 4, 2017
- Intel Corporation
- Deepak V. Kulkarni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE PACKAGE STRUCTURES
- Publication number 20170025392
- Publication date Jan 26, 2017
- Intel Corporation
- Weng Hong Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH DENSITY INTERCONNECTION OF MICROELECTRONIC DEVICES
- Publication number 20160300824
- Publication date Oct 13, 2016
- Intel Corporation
- Omkar G. Karhade
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ON PACKAGE ARCHITECTURE AND METHOD FOR MAKING
- Publication number 20160284642
- Publication date Sep 29, 2016
- Sanka GANESAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL)
- Publication number 20160233166
- Publication date Aug 11, 2016
- Intel Corporation
- Weng Hong TEH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED HIGH DENSITY SUBSTRATE ROUTING
- Publication number 20160197037
- Publication date Jul 7, 2016
- Intel Corporation
- Robert Starkston
- H01 - BASIC ELECTRIC ELEMENTS

John S. Guzek

Person

Patents Grantslast 30 patents

Embedded die on interposer packages

Localized high density substrate routing

Localized high density substrate routing

Embedded die on interposer packages

Localized high density substrate routing

Embedded semiconductive chips in reconstituted wafers, and systems...

Packaged semiconductor die with bumpless die-package interface for...

Embedded die on interposer packages

Localized high density substrate routing

Embedded semiconductive chips in reconstituted wafers, and systems...

Semiconductor package having spacer layer

Electro-magnetic interference (EMI) shielding techniques and config...

Recessed and embedded die coreless package

Logic die and other components embedded in build-up layers

Localized high density substrate routing

Package on package architecture and method for making

Recessed and embedded die coreless package

Semiconductor package having spacer layer

Microelectronic structures having laminated or embedded glass routi...

Microelectronic device and method of manufacturing same

Integrated circuit packages including high density bump-less build...

Embedded memory and power management subpackage

Integrated circuit package stack

Embedded semiconductive chips in reconstituted wafers, and systems...

High density interconnection of microelectronic devices

Panel level fabrication of package substrates with integrated stiff...

Flexible electronic assembly method

Semiconductor package with embedded die and its methods of fabrication

Electro-magnetic interference (EMI) shielding techniques and config...

Method of making an electromagnetic interference shield for semicon...

Patents Applicationslast 30 patents

EMBEDDED DIE ON INTERPOSER PACKAGES

LOCALIZED HIGH DENSITY SUBSTRATE ROUTING

EMBEDDED DIE ON INTERPOSER PACKAGES

PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR...

LOCALIZED HIGH DENSITY SUBSTRATE ROUTING

LOCALIZED HIGH DENSITY SUBSTRATE ROUTING

EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...

EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...

PACKAGED SEMICONDUCTOR DIE WITH BUMPLESS DIE-PACKAGE INTERFACE FOR...

EMBEDDED DIE ON INTERPOSER PACKAGES

LOCALIZED HIGH DENSITY SUBSTRATE ROUTING

EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...

EMBEDDED DIE ON INTERPOSER PACKAGES

RECESSED AND EMBEDDED DIE CORELESS PACKAGE

SEMICONDUCTOR PACKAGE HAVING SPACER LAYER

LOCALIZED HIGH DENSITY SUBSTRATE ROUTING

FLEXIBLE ELECTRONIC ASSEMBLY METHOD

EMBEDDED SEMICONDUCTIVE CHIPS IN RECONSTITUTED WAFERS, AND SYSTEMS...

RECESSED AND EMBEDDED DIE CORELESS PACKAGE

INTEGRATED CIRCUIT PACKAGE STACK

ELECTRO-MAGNETIC INTERFERENCE (EMI) SHIELDING TECHNIQUES AND CONFIG...

LOCALIZED HIGH DENSITY SUBSTRATE ROUTING

MICROELECTRONIC STRUCTURES HAVING LAMINATED OR EMBEDDED GLASS ROUTI...

RECESSED AND EMBEDDED DIE CORELESS PACKAGE

LOGIC DIE AND OTHER COMPONENTS EMBEDDED IN BUILD-UP LAYERS

MULTI-DIE PACKAGE STRUCTURES

HIGH DENSITY INTERCONNECTION OF MICROELECTRONIC DEVICES

PACKAGE ON PACKAGE ARCHITECTURE AND METHOD FOR MAKING

BUMPLESS DIE-PACKAGE INTERFACE FOR BUMPLESS BUILD-UP LAYER (BBUL)

LOCALIZED HIGH DENSITY SUBSTRATE ROUTING