John S. Liptay

Person

Rhinebeck, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Program store compare handling between instruction and operand caches
- Patent number 6,865,645
- Issue date Mar 8, 2005
- International Business Machines Corporation
- Chung-Lung Kevin Shum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for ensuring that a line is present in an instruction cache
- Patent number 6,751,708
- Issue date Jun 15, 2004
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Absolute address bits kept in branch history table
- Patent number 6,745,313
- Issue date Jun 1, 2004
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address generation interlock detection
- Patent number 6,671,794
- Issue date Dec 30, 2003
- International Business Machines Corporation
- Bruce C. Giamei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for testing millicode branch points
- Patent number 6,662,296
- Issue date Dec 9, 2003
- International Business Machines Corporation
- Mark S. Farrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Absolute address history table index generation for predicting inst...
- Patent number 6,138,223
- Issue date Oct 24, 2000
- International Business Machines Corporation
- Mark Anthony Check
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Millimode capable computer system providing global branch history t...
- Patent number 6,125,444
- Issue date Sep 26, 2000
- International Business Machines Corporation
- Mark Anthony Check
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Globally or selectively disabling branch history table operations d...
- Patent number 6,108,776
- Issue date Aug 22, 2000
- International Business Machines Corporation
- Mark Anthony Check
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address bit decoding for same adder circuitry for RXE instruction f...
- Patent number 6,105,126
- Issue date Aug 15, 2000
- International Business Machines Corporation
- Mark Anthony Check
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer processor system for executing RXE format floating point i...
- Patent number 6,085,313
- Issue date Jul 4, 2000
- International Business Machines Corporation
- Mark Anthony Check
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer with optimizing hardware for conditional hedge fetching in...
- Patent number 6,035,392
- Issue date Mar 7, 2000
- International Business Machines Corporation
- John Stephen Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for conditional hedge fetching into cache storage
- Patent number 6,026,488
- Issue date Feb 15, 2000
- International Business Machines Corporation
- John Stephen Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for executing denormalized numbers
- Patent number 5,903,479
- Issue date May 11, 1999
- International Business Machines Corporation
- Eric Mark Schwarz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Millicode load and test access instruction that blocks interrupts i...
- Patent number 5,790,844
- Issue date Aug 4, 1998
- International Business Machines Corporation
- Charles Franklin Webb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Specialized millicode instructions which reduce cycle time and numb...
- Patent number 5,748,951
- Issue date May 5, 1998
- International Business Machines Corporation
- Charles Franklin Webb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Linking program access register number with millicode operand access
- Patent number 5,713,035
- Issue date Jan 27, 1998
- International Business Machines Corporation
- Mark Steven Farrell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Specialized millicode instructions for test PSW validity, load with...
- Patent number 5,694,587
- Issue date Dec 2, 1997
- International Business Machines Corporation
- Charles Franklin Webb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory accessed by continuation requests
- Patent number 5,649,155
- Issue date Jul 15, 1997
- International Business Machines Corporation
- Barry Watson Krumm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read only store as part of cache store for storing frequently used...
- Patent number 5,625,808
- Issue date Apr 29, 1997
- International Business Machines Corporation
- Charles F. Webb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor with enhanced error recovery
- Patent number 5,504,859
- Issue date Apr 2, 1996
- International Business Machines Corporation
- Richard N. Gustafson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Checkpoint synchronization with instruction overlap enabled
- Patent number 5,495,590
- Issue date Feb 27, 1996
- International Business Machines Corporation
- Steven T. Comfort
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for processing checkpoint instructions to allow concurrent e...
- Patent number 5,495,587
- Issue date Feb 27, 1996
- International Business Machines Corporation
- Steven T. Comfort
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for monitoring and undoing execution of instructions beyond...
- Patent number 5,257,354
- Issue date Oct 26, 1993
- International Business Machines Corporation
- Steven T. Comfort
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system with logic for writing instruction identifying data...
- Patent number 5,134,561
- Issue date Jul 28, 1992
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system with logic for writing instruction identifying data...
- Patent number 4,901,233
- Issue date Feb 13, 1990
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address formulation interlock mechanism
- Patent number 4,287,561
- Issue date Sep 1, 1981
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-instruction stream branch processing mechanism
- Patent number 4,200,927
- Issue date Apr 29, 1980
- International Business Machines Corporation
- Jeffrey F. Hughes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operand alignment controls for VFL instructions
- Patent number 4,189,772
- Issue date Feb 19, 1980
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operand fetch control improvement
- Patent number 4,189,768
- Issue date Feb 19, 1980
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache bypass control for operand fetches
- Patent number 4,189,770
- Issue date Feb 19, 1980
- International Business Machines Corporation
- Patrick M. Gannon
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Linked instruction buffering of basic blocks for asynchronous predi...
- Publication number 20050257035
- Publication date Nov 17, 2005
- International Business Machines Corporation
- Brian Robert Prasky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Absolute address bits kept in branch history table
- Publication number 20030131212
- Publication date Jul 10, 2003
- International Business Machines Corporation
- John S. Liptay
- G06 - COMPUTING CALCULATING COUNTING

John S. Liptay

Person

Patents Grantslast 30 patents

Program store compare handling between instruction and operand caches

Method for ensuring that a line is present in an instruction cache

Absolute address bits kept in branch history table

Address generation interlock detection

Method and system for testing millicode branch points

Absolute address history table index generation for predicting inst...

Millimode capable computer system providing global branch history t...

Globally or selectively disabling branch history table operations d...

Address bit decoding for same adder circuitry for RXE instruction f...

Computer processor system for executing RXE format floating point i...

Computer with optimizing hardware for conditional hedge fetching in...

Method for conditional hedge fetching into cache storage

Method and system for executing denormalized numbers

Millicode load and test access instruction that blocks interrupts i...

Specialized millicode instructions which reduce cycle time and numb...

Linking program access register number with millicode operand access

Specialized millicode instructions for test PSW validity, load with...

Cache memory accessed by continuation requests

Read only store as part of cache store for storing frequently used...

Data processor with enhanced error recovery

Checkpoint synchronization with instruction overlap enabled

Method for processing checkpoint instructions to allow concurrent e...

System for monitoring and undoing execution of instructions beyond...

Computer system with logic for writing instruction identifying data...

Computer system with logic for writing instruction identifying data...

Address formulation interlock mechanism

Multi-instruction stream branch processing mechanism

Operand alignment controls for VFL instructions

Operand fetch control improvement

Cache bypass control for operand fetches

Patents Applicationslast 30 patents

Linked instruction buffering of basic blocks for asynchronous predi...

Absolute address bits kept in branch history table