Kenneth M. Butler

Person

Richardson, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Visual identification of semiconductor dies
- Patent number 10,431,551
- Issue date Oct 1, 2019
- Texas Instruments Incorporated
- Kenneth Michael Butler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Visual identification of semiconductor dies
- Patent number 9,899,332
- Issue date Feb 20, 2018
- Texas Instruments Incorporated
- Kenneth Michael Butler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through carrier dual side loop-back testing of TSV die after die at...
- Patent number 8,344,749
- Issue date Jan 1, 2013
- Texas Instruments Incorporated
- Daniel Joseph Stillman
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor outlier identification using serially-combined data t...
- Patent number 8,126,681
- Issue date Feb 28, 2012
- Texas Instruments Incorporated
- Amit V Nahar
- G01 - MEASURING TESTING
Information Patent Grant
Test method and system for characterizing and/or refining an IC des...
- Patent number 8,051,398
- Issue date Nov 1, 2011
- Texas Instruments Incorporated
- Clive D. Bittlestone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for estimating test escapes in integrated circuits
- Patent number 7,865,849
- Issue date Jan 4, 2011
- Texas Instruments Incorporated
- Kenneth M. Butler
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus to analyze on-chip controlled integrated circ...
- Patent number 7,839,155
- Issue date Nov 23, 2010
- Texas Instruments Incorporated
- Kenneth Michael Butler
- G01 - MEASURING TESTING
Information Patent Grant
Identification of outlier semiconductor devices using data-driven s...
- Patent number 7,494,829
- Issue date Feb 24, 2009
- Texas Instruments Incorporated
- Suresh Subramaniam
- G01 - MEASURING TESTING
Information Patent Grant
Generating an abbreviated netlist including pseudopin inputs and ou...
- Patent number 7,203,880
- Issue date Apr 10, 2007
- Texas Instruments Incorporated
- Srinivasa Chakravarthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for test data-driven statistical detection of outlier semico...
- Patent number 7,129,735
- Issue date Oct 31, 2006
- Texas Instruments Incorporated
- Suresh Subramaniam
- G01 - MEASURING TESTING
Information Patent Grant
Generating netlist test vectors by stripping references to a pseudo...
- Patent number 6,697,982
- Issue date Feb 24, 2004
- Texas Instruments Incorporated
- Srinivasa Chakravarthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for pruning a bridging diagnostic list
- Patent number 6,618,830
- Issue date Sep 9, 2003
- Texas Instruments Incorporated
- Hari Balachandran
- G01 - MEASURING TESTING
Information Patent Grant
System and method for structurally testing integrated circuit devices
- Patent number 5,694,402
- Issue date Dec 2, 1997
- Texas Instruments Incorporated
- Kenneth M. Butler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VISUAL IDENTIFICATION OF SEMICONDUCTOR DIES
- Publication number 20180130754
- Publication date May 10, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Kenneth Michael Butler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VISUAL IDENTIFICATION OF SEMICONDUCTOR DIES
- Publication number 20170243831
- Publication date Aug 24, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Kenneth Michael Butler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Creating Unique Device Identification For Semiconductor Devices
- Publication number 20160351508
- Publication date Dec 1, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Venkataramanan Kalyanaraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Real Time Semiconductor Process Excursion Monitor
- Publication number 20150234000
- Publication date Aug 20, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Kenneth Michael Butler
- G01 - MEASURING TESTING
Information Patent Application
THROUGH CARRIER DUAL SIDE LOOP-BACK TESTING OF TSV DIE AFTER DIE AT...
- Publication number 20110298488
- Publication date Dec 8, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Joseph Stillman
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR OUTLIER IDENTIFICATION USING SERIALLY-COMBINED DATA T...
- Publication number 20110071782
- Publication date Mar 24, 2011
- TEXAS INSTRUMENTS INCORPORATED
- AMIT V. NAHAR
- G01 - MEASURING TESTING
Information Patent Application
METHODS AND APPARATUS TO ANALYZE ON-CHIP CONTROLLED INTEGRATED CIRC...
- Publication number 20100148808
- Publication date Jun 17, 2010
- Kenneth Michael Butler
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR ESTIMATING TEST ESCAPES IN INTEGRATED CIRCUITS
- Publication number 20090210830
- Publication date Aug 20, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Kenneth M. Butler
- G01 - MEASURING TESTING
Information Patent Application
Test Method and System for Characterizing and/or Refining an IC Des...
- Publication number 20090037854
- Publication date Feb 5, 2009
- Clive D. Bittlestone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Identification of Outlier Semiconductor Devices Using Data-Driven S...
- Publication number 20080262793
- Publication date Oct 23, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Suresh SUBRAMANIAM
- G01 - MEASURING TESTING
Information Patent Application
Generating scan test vectors for proprietary cores using pseudo pins
- Publication number 20070288797
- Publication date Dec 13, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Srinivasa Chakravarthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power reduction in module-based scan testing
- Publication number 20060107144
- Publication date May 18, 2006
- Jayashree Saxena
- G01 - MEASURING TESTING
Information Patent Application
Method for test data-driven statistical detection of outlier semico...
- Publication number 20060028229
- Publication date Feb 9, 2006
- TEXAS INSTRUMENTS INCORPORATED
- Suresh Subramaniam
- G01 - MEASURING TESTING
Information Patent Application
Using pseudo-pins in generating scan test vectors for testing an em...
- Publication number 20040158789
- Publication date Aug 12, 2004
- Srinivasa Chakravarthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using pseudo-pins in generating scan test vectors for testing an em...
- Publication number 20030014703
- Publication date Jan 16, 2003
- Srinivasa Chakravarthy
- G01 - MEASURING TESTING
Information Patent Application
Power reduction in module-based scan testing
- Publication number 20020170010
- Publication date Nov 14, 2002
- Jayashree Saxena
- G01 - MEASURING TESTING

Kenneth M. Butler

Person

Patents Grantslast 30 patents

Visual identification of semiconductor dies

Visual identification of semiconductor dies

Through carrier dual side loop-back testing of TSV die after die at...

Semiconductor outlier identification using serially-combined data t...

Test method and system for characterizing and/or refining an IC des...

System and method for estimating test escapes in integrated circuits

Methods and apparatus to analyze on-chip controlled integrated circ...

Identification of outlier semiconductor devices using data-driven s...

Generating an abbreviated netlist including pseudopin inputs and ou...

Method for test data-driven statistical detection of outlier semico...

Generating netlist test vectors by stripping references to a pseudo...

System and method for pruning a bridging diagnostic list

System and method for structurally testing integrated circuit devices

Patents Applicationslast 30 patents

VISUAL IDENTIFICATION OF SEMICONDUCTOR DIES

VISUAL IDENTIFICATION OF SEMICONDUCTOR DIES

Creating Unique Device Identification For Semiconductor Devices

Real Time Semiconductor Process Excursion Monitor

THROUGH CARRIER DUAL SIDE LOOP-BACK TESTING OF TSV DIE AFTER DIE AT...

SEMICONDUCTOR OUTLIER IDENTIFICATION USING SERIALLY-COMBINED DATA T...

METHODS AND APPARATUS TO ANALYZE ON-CHIP CONTROLLED INTEGRATED CIRC...

SYSTEM AND METHOD FOR ESTIMATING TEST ESCAPES IN INTEGRATED CIRCUITS

Test Method and System for Characterizing and/or Refining an IC Des...

Identification of Outlier Semiconductor Devices Using Data-Driven S...

Generating scan test vectors for proprietary cores using pseudo pins

Power reduction in module-based scan testing

Method for test data-driven statistical detection of outlier semico...

Using pseudo-pins in generating scan test vectors for testing an em...

Using pseudo-pins in generating scan test vectors for testing an em...

Power reduction in module-based scan testing