Kerry Veenstra

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for efficient deployment of nodes in a network
- Patent number 11,558,755
- Issue date Jan 17, 2023
- The Regents of the University of California
- Kerry Veenstra
- G08 - SIGNALLING
Information Patent Grant
Apparatus and methods for communicating with programmable devices
- Patent number 9,274,980
- Issue date Mar 1, 2016
- Altera Corporation
- Renxin Xia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for routing of signals
- Patent number 8,912,831
- Issue date Dec 16, 2014
- Altera Corporation
- Kerry Veenstra
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for communicating with programmable devices
- Patent number 8,719,458
- Issue date May 6, 2014
- Altera Corporation
- Renxin Xia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for communicating with programmable devices
- Patent number 8,554,959
- Issue date Oct 8, 2013
- Altera Corporation
- Renxin Xia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Booting mechanism for FPGA-based embedded system
- Patent number 8,412,918
- Issue date Apr 2, 2013
- Altera Corporation
- Timothy P. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for routing of signals
- Patent number 8,233,577
- Issue date Jul 31, 2012
- Altera Corporation
- Kerry Veenstra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Tool with graphical interconnect matrix
- Patent number 8,191,035
- Issue date May 29, 2012
- Altera Corporation
- David Van Brink
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for communicating with programmable devices
- Patent number 8,190,787
- Issue date May 29, 2012
- Altera Corporation
- Renxin Xia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error detection on programmable logic resources
- Patent number 8,130,574
- Issue date Mar 6, 2012
- Altera Corporation
- Ninh D. Ngo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error detection on programmable logic resources
- Patent number 7,907,460
- Issue date Mar 15, 2011
- Altera Corporation
- Ninh D. Ngo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Booting mechanism for FPGA-based embedded system
- Patent number 7,822,958
- Issue date Oct 26, 2010
- Altera Corporation
- Timothy P. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Design tool with graphical interconnect matrix
- Patent number 7,802,221
- Issue date Sep 21, 2010
- Altera Corporation
- David Van Brink
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for communicating with programmable logic dev...
- Patent number 7,650,438
- Issue date Jan 19, 2010
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for low power routing of signals in a low volt...
- Patent number 7,593,499
- Issue date Sep 22, 2009
- Altera Corporation
- Kerry Veenstra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for debugging embedded systems having read onl...
- Patent number 7,584,456
- Issue date Sep 1, 2009
- Altera Corporation
- Kerry Veenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection on programmable logic resources
- Patent number 7,577,055
- Issue date Aug 18, 2009
- Altera Corporation
- Ninh D. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for communicating with programmable logic dev...
- Patent number 7,574,533
- Issue date Aug 11, 2009
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable programmable logic system with configuration recover...
- Patent number 7,512,849
- Issue date Mar 31, 2009
- Altera Corporation
- Tim Allen
- G01 - MEASURING TESTING
Information Patent Grant
Embedding identification information on programmable devices
- Patent number 7,472,369
- Issue date Dec 30, 2008
- Altera Corporation
- Peter Bain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable chip bus arbitration logic
- Patent number 7,395,360
- Issue date Jul 1, 2008
- Altera Corporation
- Jeffrey Orion Pritchard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for communicating with programmable logic dev...
- Patent number 7,356,620
- Issue date Apr 8, 2008
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection on programmable logic resources
- Patent number 7,310,757
- Issue date Dec 18, 2007
- Altera Corporation
- Ninh D. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PCI-compatible programmable logic devices
- Patent number 7,148,722
- Issue date Dec 12, 2006
- Altera Corporation
- Richard G Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable programmable logic system with configuration recover...
- Patent number 7,000,161
- Issue date Feb 14, 2006
- Altera Corporation
- Tim Allen
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus and method for low power routing of signals in a Low Volt...
- Patent number 6,956,920
- Issue date Oct 18, 2005
- Altera Corporation
- Kerry Veenstra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable logic array integrated circuit devices
- Patent number 6,815,981
- Issue date Nov 9, 2004
- Altera Corporation
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic array integrated circuits
- Patent number 6,759,870
- Issue date Jul 6, 2004
- Altera Corporation
- Richard G. Cliff
- G11 - INFORMATION STORAGE
Information Patent Grant
Enhanced embedded logic analyzer
- Patent number 6,704,889
- Issue date Mar 9, 2004
- Altera Corporation
- Kerry Veenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal logic module with arithmetic capabilities
- Patent number RE38451
- Issue date Mar 2, 2004
- Altera Corporation
- Kerry S. Veenstra
- 326 - Electronic digital logic circuitry

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS AND METHOD FOR EFFICIENT DEPLOYMENT OF NODES IN A NETWORK
- Publication number 20210368356
- Publication date Nov 25, 2021
- The Regents of the University of California
- Kerry Veenstra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES
- Publication number 20140223034
- Publication date Aug 7, 2014
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES
- Publication number 20140015565
- Publication date Jan 16, 2014
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES
- Publication number 20120213017
- Publication date Aug 23, 2012
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES
- Publication number 20110138240
- Publication date Jun 9, 2011
- Altera Corporation
- Ninh D. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES
- Publication number 20100082891
- Publication date Apr 1, 2010
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES
- Publication number 20090282306
- Publication date Nov 12, 2009
- Altera Corporation
- Ninh D. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE LOGIC DEV...
- Publication number 20080157813
- Publication date Jul 3, 2008
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE LOGIC DEV...
- Publication number 20080143378
- Publication date Jun 19, 2008
- Altera Corporation
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES
- Publication number 20080052569
- Publication date Feb 28, 2008
- Altera Corporation
- Ninh D. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and methods for communicating with programmable logic dev...
- Publication number 20060038586
- Publication date Feb 23, 2006
- Renxin Xia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic array integrated circuit devices
- Publication number 20030128051
- Publication date Jul 10, 2003
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic array integrated circuits
- Publication number 20030128052
- Publication date Jul 10, 2003
- ALTERA CORPORATION, a corporation of Delaware
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE LOGIC CONFIGURATION DEVICE WITH CONFIGURATION MEMORY A...
- Publication number 20030122577
- Publication date Jul 3, 2003
- Kerry S. Veenstra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error detection on programmable logic resources
- Publication number 20030097628
- Publication date May 22, 2003
- Ninh D. Ngo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic array integrated circuit devices
- Publication number 20030016053
- Publication date Jan 23, 2003
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Enhanced embedded logic analyzer
- Publication number 20020194543
- Publication date Dec 19, 2002
- Altera Corporation, a Delaware Corporation
- Kerry Veenstra
- G01 - MEASURING TESTING
Information Patent Application
Enhanced embedded logic analyzer
- Publication number 20010037477
- Publication date Nov 1, 2001
- Kerry Veenstra
- G01 - MEASURING TESTING
Information Patent Application
Programmable logic array integrated circuit architectures
- Publication number 20010022519
- Publication date Sep 20, 2001
- Altera Corporation
- Richard G. Cliff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dual port programmable logic device variable depth and width memory...
- Publication number 20010015933
- Publication date Aug 23, 2001
- Altera Corporation
- Srinivas T. Reddy
- G11 - INFORMATION STORAGE
Information Patent Application
Techniques for programming programmable logic array devices
- Publication number 20010003844
- Publication date Jun 14, 2001
- Altera Corporation
- Richard G. Cliff
- G06 - COMPUTING CALCULATING COUNTING

Kerry Veenstra

Person

Patents Grantslast 30 patents

Apparatus and method for efficient deployment of nodes in a network

Apparatus and methods for communicating with programmable devices

Apparatus and method for routing of signals

Apparatus and methods for communicating with programmable devices

Apparatus and methods for communicating with programmable devices

Booting mechanism for FPGA-based embedded system

Apparatus and method for routing of signals

Tool with graphical interconnect matrix

Apparatus and methods for communicating with programmable devices

Error detection on programmable logic resources

Error detection on programmable logic resources

Booting mechanism for FPGA-based embedded system

Design tool with graphical interconnect matrix

Apparatus and methods for communicating with programmable logic dev...

Apparatus and method for low power routing of signals in a low volt...

Method and apparatus for debugging embedded systems having read onl...

Error detection on programmable logic resources

Apparatus and methods for communicating with programmable logic dev...

Reconfigurable programmable logic system with configuration recover...

Embedding identification information on programmable devices

Programmable chip bus arbitration logic

Apparatus and methods for communicating with programmable logic dev...

Error detection on programmable logic resources

PCI-compatible programmable logic devices

Reconfigurable programmable logic system with configuration recover...

Apparatus and method for low power routing of signals in a Low Volt...

Programmable logic array integrated circuit devices

Programmable logic array integrated circuits

Enhanced embedded logic analyzer

Universal logic module with arithmetic capabilities

Patents Applicationslast 30 patents

APPARATUS AND METHOD FOR EFFICIENT DEPLOYMENT OF NODES IN A NETWORK

APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES

APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES

APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES

ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES

APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE DEVICES

ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES

APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE LOGIC DEV...

APPARATUS AND METHODS FOR COMMUNICATING WITH PROGRAMMABLE LOGIC DEV...

ERROR DETECTION ON PROGRAMMABLE LOGIC RESOURCES

Apparatus and methods for communicating with programmable logic dev...

Programmable logic array integrated circuit devices

Programmable logic array integrated circuits

PROGRAMMABLE LOGIC CONFIGURATION DEVICE WITH CONFIGURATION MEMORY A...

Error detection on programmable logic resources

Programmable logic array integrated circuit devices

Enhanced embedded logic analyzer

Enhanced embedded logic analyzer

Programmable logic array integrated circuit architectures

Dual port programmable logic device variable depth and width memory...

Techniques for programming programmable logic array devices