Kong Yaw Lucas Lee

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Device parameter tuning
- Patent number 10,782,902
- Issue date Sep 22, 2020
- Seagate Technology LLC
- Choo Chiang Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to form shallow trench isolations
- Patent number 6,649,486
- Issue date Nov 18, 2003
- Chartered Semiconductor Manufacturing Ltd.
- Subramanian Balakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow trench isolation using TEOS cap and polysilicon pullback
- Patent number 6,613,648
- Issue date Sep 2, 2003
- Chartered Semiconductor Manufacturing Limited
- Seng-Keong Victor Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow...
- Patent number 6,410,429
- Issue date Jun 25, 2002
- Chartered Semiconductor Manufacturing Inc.
- Chaw Sing Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon nitride capped shallow trench isolation method for fabricat...
- Patent number 6,350,661
- Issue date Feb 26, 2002
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon nitride capped shallow trench isolation method for fabricat...
- Patent number 6,297,126
- Issue date Oct 2, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Partially recessed shallow trench isolation method for fabricating...
- Patent number 6,265,302
- Issue date Jul 24, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a shallow trench isolation using HDP silicon oxy...
- Patent number 6,258,676
- Issue date Jul 10, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Kong Hean Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form shallow trench isolations with rounded corners and r...
- Patent number 6,228,727
- Issue date May 8, 2001
- Chartered Semiconductor Manufacturing, Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making low-leakage architecture for sub-0.18 .mu.m salici...
- Patent number 6,165,871
- Issue date Dec 26, 2000
- Chartered Semiconductor Manufacturing Ltd.
- Eng Hua Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cmos gate architecture for integration of salicide process in sub 0...
- Patent number 6,010,954
- Issue date Jan 4, 2000
- Chartered Semiconductor Manufacturing, Ltd.
- Chaw Sing Ho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-line process monitoring using micro-raman spectroscopy
- Patent number 5,956,137
- Issue date Sep 21, 1999
- Chartered Semiconductor Manufacturing Ltd.
- Eng Hua Lim
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
DEVICE PARAMETER TUNING
- Publication number 20200065015
- Publication date Feb 27, 2020
- SEAGATE TECHNOLOGY LLC
- Choo Chiang Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sensing a prior head position by a motion pattern
- Publication number 20050201000
- Publication date Sep 15, 2005
- ChoonHoe Koh
- G11 - INFORMATION STORAGE
Information Patent Application
Silicon nitride capped shallow trench isolation method for fabricat...
- Publication number 20010031540
- Publication date Oct 18, 2001
- Chartered Semiconductor Manufacturing Ltd.
- Chong Wee Lim
- H01 - BASIC ELECTRIC ELEMENTS

Kong Yaw Lucas Lee

Person

Patents Grantslast 30 patents

Device parameter tuning

Method to form shallow trench isolations

Shallow trench isolation using TEOS cap and polysilicon pullback

Method for fabricating void-free epitaxial-CoSi2 with ultra-shallow...

Silicon nitride capped shallow trench isolation method for fabricat...

Silicon nitride capped shallow trench isolation method for fabricat...

Partially recessed shallow trench isolation method for fabricating...

Method for forming a shallow trench isolation using HDP silicon oxy...

Method to form shallow trench isolations with rounded corners and r...

Method of making low-leakage architecture for sub-0.18 .mu.m salici...

Cmos gate architecture for integration of salicide process in sub 0...

In-line process monitoring using micro-raman spectroscopy

Patents Applicationslast 30 patents

DEVICE PARAMETER TUNING

Sensing a prior head position by a motion pattern

Silicon nitride capped shallow trench isolation method for fabricat...