Lu You

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mask for forming integrated circuit
- Patent number 8,629,535
- Issue date Jan 14, 2014
- GLOBALFOUNDRIES Inc.
- Richard J. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gap-filling with uniform properties
- Patent number 8,415,256
- Issue date Apr 9, 2013
- Alexander Nickel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-H plasma treatment with N2 anneal for electronic memory devices
- Patent number 8,202,810
- Issue date Jun 19, 2012
- Spansion LLC
- Alexander H. Nickel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cu annealing for improved data retention in flash memory devices
- Patent number 8,026,169
- Issue date Sep 27, 2011
- Advanced Micro Devices, Inc.
- Lu You
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gap-filling with uniform properties
- Patent number 7,884,030
- Issue date Feb 8, 2011
- Advanced Micro Devices, Inc. and Spansion LLC
- Alexander Nickel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices with copper interconnects and composite silic...
- Patent number 7,534,732
- Issue date May 19, 2009
- Spansion LLC
- Minh Van Ngo
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for forming integrated circuit
- Patent number 7,521,304
- Issue date Apr 21, 2009
- Advanced Micro Devices, Inc.
- Richard J. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Disposable spacer process for field effect transistor fabrication
- Patent number 7,494,885
- Issue date Feb 24, 2009
- Advanced Micro Devices, Inc.
- Mario M. Pelella
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a memory device having a nanocrystal charg...
- Patent number 7,378,310
- Issue date May 27, 2008
- Spansion LLC
- Connie Pin-Chin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device having a nanocrystal charge storage region and method
- Patent number 7,309,650
- Issue date Dec 18, 2007
- Spansion LLC
- Connie Pin-Chin Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra low dielectric constant integrated circuit system
- Patent number 7,256,499
- Issue date Aug 14, 2007
- Advanced Micro Devices, Inc.
- Lu You
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sealing sidewall pores in low-k dielectrics
- Patent number 7,208,418
- Issue date Apr 24, 2007
- Advanced Micro Devices, Inc.
- Lynne A. Okada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a hardmask employing multiple independently form...
- Patent number 7,183,198
- Issue date Feb 27, 2007
- Advanced Micro Devices, Inc.
- Pei-Yuan Gao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of using an adhesion precursor layer for chemical vapor depo...
- Patent number 7,169,706
- Issue date Jan 30, 2007
- Advanced Micro Devices, Inc.
- Sergey D. Lopatin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to impr...
- Patent number 7,157,335
- Issue date Jan 2, 2007
- Spansion LLC
- Ning Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single damascene integration scheme for preventing copper contamina...
- Patent number 7,038,320
- Issue date May 2, 2006
- Advanced Micro Devices, Inc.
- Lu You
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-chamber deposition of silicon oxynitride film for patterning
- Patent number 7,033,960
- Issue date Apr 25, 2006
- Advanced Micro Devices, Inc.
- Lu You
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Interconnect with multiple layers of conductive material with grain...
- Patent number 7,001,840
- Issue date Feb 21, 2006
- Advanced Micro Devices, Inc.
- Minh Quoc Tran
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Implanted barrier layer to improve line reliability and method of f...
- Patent number 6,992,004
- Issue date Jan 31, 2006
- Advanced Micro Devices, Inc.
- Paul R. Besser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene integration scheme for preventing copper contaminati...
- Patent number 6,939,793
- Issue date Sep 6, 2005
- Advanced Micro Devices, Inc.
- Lu You
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antireflective bi-layer hardmask including a densified amorphous ca...
- Patent number 6,900,002
- Issue date May 31, 2005
- Advanced Micro Devices, Inc.
- Marina V. Plat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
L-shaped spacer incorporating or patterned using amorphous carbon o...
- Patent number 6,893,967
- Issue date May 17, 2005
- Advanced Micro Devices, Inc.
- Marilyn I. Wright
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of amorphous carbon ARC stack having graded transition be...
- Patent number 6,875,664
- Issue date Apr 5, 2005
- Advanced Micro Devices, Inc.
- Richard J. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CVD organic polymer film for advanced gate patterning
- Patent number 6,864,556
- Issue date Mar 8, 2005
- Advanced Micro Devices, Inc.
- Lu You
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a hardmask employing multiple independently form...
- Patent number 6,803,313
- Issue date Oct 12, 2004
- Advanced Micro Devices, Inc.
- Pei-Yuan Gao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CF4+H2O plasma ashing for reduction of contact/via resistance
- Patent number 6,794,298
- Issue date Sep 21, 2004
- Advanced Micro Devices, Inc.
- Jeffrey A. Shields
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Phosphine treatment of low dielectric constant materials in semicon...
- Patent number 6,784,095
- Issue date Aug 31, 2004
- Advanced Micro Devices, Inc.
- Suzette K. Pangrle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modified film stack and patterning strategy for stress compensation...
- Patent number 6,773,998
- Issue date Aug 10, 2004
- Advanced Micro Devices, Inc.
- Philip A. Fisher
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing gate line deformation and reducing gate line wi...
- Patent number 6,764,947
- Issue date Jul 20, 2004
- Advanced Micro Devices, Inc.
- Darin Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reducing pattern deformation and photoresist poisoning i...
- Patent number 6,764,949
- Issue date Jul 20, 2004
- Advanced Micro Devices, Inc.
- Douglas J. Bonser
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MASK FOR FORMING INTEGRATED CIRCUIT
- Publication number 20120007221
- Publication date Jan 12, 2012
- GLOBALFOUNDRIES INC.
- Richard J. Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW-H PLASMA TREATMENT WITH N2 ANNEAL FOR ELECTRONIC MEMORY DEVICES
- Publication number 20090176369
- Publication date Jul 9, 2009
- Alexander H. Nickel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cu annealing for improved data retention in flash memory devices
- Publication number 20080108193
- Publication date May 8, 2008
- Spansion LLC
- Lu You
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Conformal liner for gap-filling
- Publication number 20080096364
- Publication date Apr 24, 2008
- Spansion LLC
- Erik Wilson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to impr...
- Publication number 20070029604
- Publication date Feb 8, 2007
- Ning Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of using an adhesion precursor layer for chemical vapor depo...
- Publication number 20050085073
- Publication date Apr 21, 2005
- Advanced Micro Devices, Inc.
- Sergey D. Lopatin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hardmask employing multiple layers of silicon oxynitride
- Publication number 20050048771
- Publication date Mar 3, 2005
- Advanced Micro Devices, Inc.
- Pei-Yuan Gao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hardmask employing multiple layers of silicon oxynitride
- Publication number 20040061227
- Publication date Apr 1, 2004
- Advanced Micro Devices, Inc.
- Pei-Yuan Gao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for reducing pattern deformation and photoresist poisoning i...
- Publication number 20040023475
- Publication date Feb 5, 2004
- Advanced Micro Devices, Inc.
- Douglas J. Bonser
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for characterizing and reducing adverse effects of texture...
- Publication number 20010053600
- Publication date Dec 20, 2001
- Guarionex Morales
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CF4+H20 Plasma ashing for reduction of contact/via resistance
- Publication number 20010036740
- Publication date Nov 1, 2001
- Jeffrey A Shields
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOLUTION FLOW-IN FOR UNIFORM DEPOSITION OF SPIN-ON FILMS
- Publication number 20010029111
- Publication date Oct 11, 2001
- Advanced Micro Devices, Inc.
- LU YOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for reduced gate aspect ratio to improve gap-fill after spac...
- Publication number 20010016386
- Publication date Aug 23, 2001
- John JianShi Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS FOR MANUFACTURING PLANAR SPIN-ON FILMS
- Publication number 20010001407
- Publication date May 24, 2001
- LU YOU
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Mask for forming integrated circuit

Gap-filling with uniform properties

Low-H plasma treatment with N2 anneal for electronic memory devices

Cu annealing for improved data retention in flash memory devices

Gap-filling with uniform properties

Semiconductor devices with copper interconnects and composite silic...

Method for forming integrated circuit

Disposable spacer process for field effect transistor fabrication

Method for manufacturing a memory device having a nanocrystal charg...

Memory device having a nanocrystal charge storage region and method

Ultra low dielectric constant integrated circuit system

Sealing sidewall pores in low-k dielectrics

Method for forming a hardmask employing multiple independently form...

Method of using an adhesion precursor layer for chemical vapor depo...

Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to impr...

Single damascene integration scheme for preventing copper contamina...

Multi-chamber deposition of silicon oxynitride film for patterning

Interconnect with multiple layers of conductive material with grain...

Implanted barrier layer to improve line reliability and method of f...

Dual damascene integration scheme for preventing copper contaminati...

Antireflective bi-layer hardmask including a densified amorphous ca...

L-shaped spacer incorporating or patterned using amorphous carbon o...

Formation of amorphous carbon ARC stack having graded transition be...

CVD organic polymer film for advanced gate patterning

Method for forming a hardmask employing multiple independently form...

CF4&#x0002B;H2O plasma ashing for reduction of contact/via resistance

Phosphine treatment of low dielectric constant materials in semicon...

Modified film stack and patterning strategy for stress compensation...

Method for reducing gate line deformation and reducing gate line wi...

Method for reducing pattern deformation and photoresist poisoning i...

Patents Applicationslast 30 patents

MASK FOR FORMING INTEGRATED CIRCUIT

LOW-H PLASMA TREATMENT WITH N2 ANNEAL FOR ELECTRONIC MEMORY DEVICES

Cu annealing for improved data retention in flash memory devices

Conformal liner for gap-filling

Using thin undoped TEOS with BPTEOS ILD or BPTEOS ILD alone to impr...

Method of using an adhesion precursor layer for chemical vapor depo...

Hardmask employing multiple layers of silicon oxynitride

Hardmask employing multiple layers of silicon oxynitride

Method for reducing pattern deformation and photoresist poisoning i...

Methods for characterizing and reducing adverse effects of texture...

CF4+H20 Plasma ashing for reduction of contact/via resistance

SOLUTION FLOW-IN FOR UNIFORM DEPOSITION OF SPIN-ON FILMS

Method for reduced gate aspect ratio to improve gap-fill after spac...

APPARATUS FOR MANUFACTURING PLANAR SPIN-ON FILMS

CF4+H2O plasma ashing for reduction of contact/via resistance