Makarem A. Hussein

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Antireflective coatings for via fill and photolithography applicati...
- Patent number 8,992,806
- Issue date Mar 31, 2015
- Honeywell International Inc.
- Bo Li
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Grant
Dielectric spacers for metal interconnects and method to form the same
- Patent number 8,394,701
- Issue date Mar 12, 2013
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Antireflective coatings for via fill and photolithography applicati...
- Patent number 8,053,159
- Issue date Nov 8, 2011
- Honeywell International Inc.
- Bo Li
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Grant
Dielectric spacers for metal interconnects and method to form the same
- Patent number 7,923,760
- Issue date Apr 12, 2011
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Soluble hard mask for interlayer dielectric patterning
- Patent number 7,659,196
- Issue date Feb 9, 2010
- Intel Corporation
- Magdy S. Abdelrahman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric spacers for metal interconnects and method to form the same
- Patent number 7,649,239
- Issue date Jan 19, 2010
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cleaning composition and method of cleaning semiconductor substrate
- Patent number 7,442,675
- Issue date Oct 28, 2008
- Tokyo Ohka Kogyo Co., Ltd.
- Shigeru Yokoi
- C11 - ANIMAL AND VEGETABLE OILS, FATS, FATTY SUBSTANCES AND WAXES FATTY ACIDS...
Information Patent Grant
Methods and apparatuses for producing a polymer memory device
- Patent number 7,326,981
- Issue date Feb 5, 2008
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Continuous metal interconnects
- Patent number 7,166,922
- Issue date Jan 23, 2007
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Damascene process for fabricating interconnect layers in an integra...
- Patent number 7,157,380
- Issue date Jan 2, 2007
- Intel Corporation
- Valery M. Dubin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatuses for producing a polymer memory device
- Patent number 7,078,754
- Issue date Jul 18, 2006
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress mitigation layer to reduce under bump stress concentration
- Patent number 7,071,554
- Issue date Jul 4, 2006
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of conductive electrolessly deposited etch stop layers, liner l...
- Patent number 7,008,872
- Issue date Mar 7, 2006
- Intel Corporation
- Valery M. Dubin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermoelectric cooling for microelectronic packages and dice
- Patent number 6,981,380
- Issue date Jan 3, 2006
- Intel Corporation
- Gregory M. Chrysler
- F25 - REFRIGERATION OR COOLING COMBINED HEATING AND REFRIGERATION SYSTEMS HEA...
Information Patent Grant
Interconnect structures containing conductive electrolessly deposit...
- Patent number 6,958,547
- Issue date Oct 25, 2005
- Intel Corporation
- Valery M. Dubin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming an air gap intermetal layer dielectric (ILD) by u...
- Patent number 6,908,829
- Issue date Jun 21, 2005
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatuses for producing a polymer memory device
- Patent number 6,900,063
- Issue date May 31, 2005
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method integrating polymeric interlayer dielectric in integrated ci...
- Patent number 6,774,037
- Issue date Aug 10, 2004
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor having a deposited dual-layer spacer structure
- Patent number 6,720,631
- Issue date Apr 13, 2004
- Intel Corporation
- Lawrence N. Brigham
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photoimageable material patterning techniques useful in fabricating...
- Patent number 6,649,515
- Issue date Nov 18, 2003
- Intel Corporation
- Peter K. Moon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pattern-sensitive deposition for damascene processing
- Patent number 6,406,995
- Issue date Jun 18, 2002
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single step electroplating process for interconnect via fill and me...
- Patent number 6,384,481
- Issue date May 7, 2002
- Intel Corporation
- Makarem Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for patterning dual damascene interconnects using a sacrific...
- Patent number 6,365,529
- Issue date Apr 2, 2002
- Intel Corporation
- Makarem A. Hussein
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for patterning dual damascene interconnects using a sacrific...
- Patent number 6,329,118
- Issue date Dec 11, 2001
- Intel Corporation
- Makarem A. Hussein
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Process to manufacture continuous metal interconnects
- Patent number 6,169,024
- Issue date Jan 2, 2001
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making integrated circuit having polymer interlayer diel...
- Patent number 6,037,255
- Issue date Mar 14, 2000
- Intel Corporation
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single step electroplating process for interconnect via fill and me...
- Patent number 6,020,266
- Issue date Feb 1, 2000
- Intel Corporation
- Makarem Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a transistor having a deposited dual-layer spacer...
- Patent number 5,714,413
- Issue date Feb 3, 1998
- Intel Corporation
- Lawrence N. Brigham
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Antireflective Coatings for Via Fill and Photolithography Applicati...
- Publication number 20120001135
- Publication date Jan 5, 2012
- Bo Li
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
DIELECTRIC SPACERS FOR METAL INTERCONNECTS AND METHOD TO FORM THE SAME
- Publication number 20110171823
- Publication date Jul 14, 2011
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIELECTRIC SPACERS FOR METAL INTERCONNECTS AND METHOD TO FORM THE SAME
- Publication number 20100071941
- Publication date Mar 25, 2010
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AIRGAP INTERCONNECT SYSTEM
- Publication number 20090001594
- Publication date Jan 1, 2009
- Hui Jae Yoo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Soluble hard mask for interlayer dielectric patterning
- Publication number 20080153283
- Publication date Jun 26, 2008
- Magdy S. Abdelrahman
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dielectric spacers for metal interconnects and method to form the same
- Publication number 20070257368
- Publication date Nov 8, 2007
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photoresist top coat out-of-band illumination filter for photolitho...
- Publication number 20070231751
- Publication date Oct 4, 2007
- Robert L. Bristol
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Methods and apparatuses for producing a polymer memory device
- Publication number 20060157764
- Publication date Jul 20, 2006
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stress mitigation layer to reduce under bump stress concentration
- Publication number 20050275095
- Publication date Dec 15, 2005
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Antireflective coatings for via fill and photolithography applicati...
- Publication number 20050171277
- Publication date Aug 4, 2005
- Bo Li
- C09 - DYES PAINTS POLISHES NATURAL RESINS ADHESIVES MISCELLANEOUS COMPOSITION...
Information Patent Application
Damascene process for fabricating interconnect layers in an integra...
- Publication number 20050148190
- Publication date Jul 7, 2005
- Valery M. Dubin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUSES FOR PRODUCING A POLYMER MEMORY DEVICE
- Publication number 20050084985
- Publication date Apr 21, 2005
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and apparatuses for producing a polymer memory device
- Publication number 20050082584
- Publication date Apr 21, 2005
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cleaning composition, method of cleaning semiconductor substrate, a...
- Publication number 20040259761
- Publication date Dec 23, 2004
- TOKYO OHKA KOGYO CO., LTD. INTEL CORPORATION
- Shigeru Yokoi
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Thermoelectric cooling for microelectronic packages and dice
- Publication number 20040118129
- Publication date Jun 24, 2004
- Gregory M. Chrysler
- F25 - REFRIGERATION OR COOLING COMBINED HEATING AND REFRIGERATION SYSTEMS HEA...
Information Patent Application
Method integrating polymeric interlayer dielectric in integrated ci...
- Publication number 20030216057
- Publication date Nov 20, 2003
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Use of conductive electrolessly deposited etch stop layers, liner l...
- Publication number 20030207560
- Publication date Nov 6, 2003
- Valery M. Dubin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect structures containing conductive electrolessly deposit...
- Publication number 20030207561
- Publication date Nov 6, 2003
- Valery M. Dubin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming an air gap intermetal layer dielectric (ILD) by u...
- Publication number 20030168747
- Publication date Sep 11, 2003
- Makarem A. Hussein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PATTERNING DUAL DAMASCENE INTERCONNECTS USING A SACRIFIC...
- Publication number 20010055725
- Publication date Dec 27, 2001
- MAKAREM A. HUSSEIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR HAVING A DEPOSITED DUAL-LAYER SPACER STRUCTURE
- Publication number 20010042894
- Publication date Nov 22, 2001
- LAWRENCE N. BRIGHAM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNING CONDUCTIVE LINES IN CIRCUIT STRUCTURES
- Publication number 20010021581
- Publication date Sep 13, 2001
- PETER K MOON
- H01 - BASIC ELECTRIC ELEMENTS

Makarem A. Hussein

Person

Patents Grantslast 30 patents

Antireflective coatings for via fill and photolithography applicati...

Dielectric spacers for metal interconnects and method to form the same

Antireflective coatings for via fill and photolithography applicati...

Dielectric spacers for metal interconnects and method to form the same

Soluble hard mask for interlayer dielectric patterning

Dielectric spacers for metal interconnects and method to form the same

Cleaning composition and method of cleaning semiconductor substrate

Methods and apparatuses for producing a polymer memory device

Continuous metal interconnects

Damascene process for fabricating interconnect layers in an integra...

Methods and apparatuses for producing a polymer memory device

Stress mitigation layer to reduce under bump stress concentration

Use of conductive electrolessly deposited etch stop layers, liner l...

Thermoelectric cooling for microelectronic packages and dice

Interconnect structures containing conductive electrolessly deposit...

Method of forming an air gap intermetal layer dielectric (ILD) by u...

Methods and apparatuses for producing a polymer memory device

Method integrating polymeric interlayer dielectric in integrated ci...

Transistor having a deposited dual-layer spacer structure

Photoimageable material patterning techniques useful in fabricating...

Pattern-sensitive deposition for damascene processing

Single step electroplating process for interconnect via fill and me...

Method for patterning dual damascene interconnects using a sacrific...

Method for patterning dual damascene interconnects using a sacrific...

Process to manufacture continuous metal interconnects

Method for making integrated circuit having polymer interlayer diel...

Single step electroplating process for interconnect via fill and me...

Method of making a transistor having a deposited dual-layer spacer...

Patents Applicationslast 30 patents

Antireflective Coatings for Via Fill and Photolithography Applicati...

DIELECTRIC SPACERS FOR METAL INTERCONNECTS AND METHOD TO FORM THE SAME

DIELECTRIC SPACERS FOR METAL INTERCONNECTS AND METHOD TO FORM THE SAME

AIRGAP INTERCONNECT SYSTEM

Soluble hard mask for interlayer dielectric patterning

Dielectric spacers for metal interconnects and method to form the same

Photoresist top coat out-of-band illumination filter for photolitho...

Methods and apparatuses for producing a polymer memory device

Stress mitigation layer to reduce under bump stress concentration

Antireflective coatings for via fill and photolithography applicati...

Damascene process for fabricating interconnect layers in an integra...

METHODS AND APPARATUSES FOR PRODUCING A POLYMER MEMORY DEVICE

Methods and apparatuses for producing a polymer memory device

Cleaning composition, method of cleaning semiconductor substrate, a...

Thermoelectric cooling for microelectronic packages and dice

Method integrating polymeric interlayer dielectric in integrated ci...

Use of conductive electrolessly deposited etch stop layers, liner l...

Interconnect structures containing conductive electrolessly deposit...

Method of forming an air gap intermetal layer dielectric (ILD) by u...

METHOD FOR PATTERNING DUAL DAMASCENE INTERCONNECTS USING A SACRIFIC...

TRANSISTOR HAVING A DEPOSITED DUAL-LAYER SPACER STRUCTURE

PATTERNING CONDUCTIVE LINES IN CIRCUIT STRUCTURES