Claims
- 1. An integrated circuit having an interconnect system formed by a process comprising:(a) forming a barrier layer onto a surface of a substrate that has at least one via; (b) forming a conductive layer onto the barrier layer; (c) forming a photoresist layer onto the conductive layer and patterning the photoresist layer; (d) forming a metal via plug into the at least one via and forming a metal line onto said metal via plug; (e) after forming the via plug and the metal line, removing the layer of photoresist; and (f) removing the conductive layer not covered by said metal line to expose uncovered portions of the barrier layer.
- 2. The integrated circuit formed by the process in claim 1, the process further comprising:removing the uncovered portion of the barrier layer to expose portions of a dielectric layer; and forming a diffusion barrier layer over the metal line and the exposed portions of the dielectric layer.
- 3. The integrated circuit formed by the process in claim 1, wherein the barrier layer comprises a compound including titanium.
- 4. The integrated circuit formed by the process in claim 1, wherein forming the via plug and the metal line comprises an electroplating process.
- 5. The integrated circuit formed by the process in claim 4, wherein the electroplating process comprises immersing the substrate with the barrier layer and the conductive layer in a solution of copper sulfate having a pH range of 6.5 to 7.5.
Parent Case Info
This application is a divisional application of U.S. application Ser. No. 09/001349 filed Dec. 31, 1997 and now U.S. Pat. No. 6,020,266.
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