Marcos Karnezos

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor multi-package module including tape substrate land gr...
- Patent number 8,994,162
- Issue date Mar 31, 2015
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple chip package module having inverted package stacked over die
- Patent number 8,970,049
- Issue date Mar 3, 2015
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adhesive/spacer island structure for stacking over wire bonded die
- Patent number 8,552,551
- Issue date Oct 8, 2013
- ChipPAC, Inc.
- Sang Ho Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multi-package module including tape substrate land gr...
- Patent number 8,410,596
- Issue date Apr 2, 2013
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor multi-package module having w...
- Patent number 8,143,100
- Issue date Mar 27, 2012
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plastic ball grid array package with integral heatsink
- Patent number 8,030,756
- Issue date Oct 4, 2011
- ChipPAC, Inc.
- Taekeun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor package having adhesive/spacer structure and...
- Patent number 8,030,134
- Issue date Oct 4, 2011
- ChipPAC, Inc.
- Hyeog Chan Kwon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multi-package module having package stacked over die-...
- Patent number 7,935,572
- Issue date May 3, 2011
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system including shield
- Patent number 7,923,822
- Issue date Apr 12, 2011
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making semiconductor multipackage module including die a...
- Patent number 7,829,382
- Issue date Nov 9, 2010
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor multipackage module including...
- Patent number 7,749,807
- Issue date Jul 6, 2010
- ChipPAC, Inc.
- Marcos Karnezos
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Flip chip interconnection
- Patent number 7,736,950
- Issue date Jun 15, 2010
- STATS ChipPAC, Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multi-package module having package stacked over die-...
- Patent number 7,732,254
- Issue date Jun 8, 2010
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system including shield
- Patent number 7,728,417
- Issue date Jun 1, 2010
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multipackage module including die and inverted land g...
- Patent number 7,692,279
- Issue date Apr 6, 2010
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor multi package module having a...
- Patent number 7,687,313
- Issue date Mar 30, 2010
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multi-package module having package stacked over die-...
- Patent number 7,682,873
- Issue date Mar 23, 2010
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating module having stacked chip scale semiconducto...
- Patent number 7,645,634
- Issue date Jan 12, 2010
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multi-package module having package stacked over ball...
- Patent number 7,638,363
- Issue date Dec 29, 2009
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor multipackage module including tape substrate land gri...
- Patent number 7,589,407
- Issue date Sep 15, 2009
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple chip package module including die stacked over encapsulate...
- Patent number 7,582,960
- Issue date Sep 1, 2009
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor multi-package module having inver...
- Patent number 7,494,847
- Issue date Feb 24, 2009
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor assembly including chip scale package and second subs...
- Patent number 7,429,787
- Issue date Sep 30, 2008
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package including second substrate and having exposed...
- Patent number 7,429,786
- Issue date Sep 30, 2008
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Module having stacked chip scale semiconductor packages
- Patent number 7,394,148
- Issue date Jul 1, 2008
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor stacked package assembly having exposed substrate sur...
- Patent number 7,372,141
- Issue date May 13, 2008
- Stats Chippac Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor multi-package module having i...
- Patent number 7,364,946
- Issue date Apr 29, 2008
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor assembly including chip scale...
- Patent number 7,358,115
- Issue date Apr 15, 2008
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor multi-package module having a...
- Patent number 7,351,610
- Issue date Apr 1, 2008
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor multipackage module including a p...
- Patent number 7,306,973
- Issue date Dec 11, 2007
- ChipPAC, Inc.
- Marcos Karnezos
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
Flip-chip underfill
- Publication number 20110115099
- Publication date May 19, 2011
- Vertical Circuits, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING SHIELD
- Publication number 20100200967
- Publication date Aug 12, 2010
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER DIE-...
- Publication number 20100200966
- Publication date Aug 12, 2010
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING DIE A...
- Publication number 20100136744
- Publication date Jun 3, 2010
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GR...
- Publication number 20090283890
- Publication date Nov 19, 2009
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flip chip interconnection
- Publication number 20090045507
- Publication date Feb 19, 2009
- STATS ChipPAC Ltd.
- Rajendra D. Pendse
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a semiconductor multipackage module including a p...
- Publication number 20090027863
- Publication date Jan 29, 2009
- Marcos Karnezos
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
MODULE HAVING STACKED CHIP SCALE SEMICONDUCTOR PACKAGES
- Publication number 20080220563
- Publication date Sep 11, 2008
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GR...
- Publication number 20080179733
- Publication date Jul 31, 2008
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING I...
- Publication number 20080171402
- Publication date Jul 17, 2008
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Multi-Package Module Having Package Stacked Over Die-...
- Publication number 20080036096
- Publication date Feb 14, 2008
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a semiconductor multi-package module having inver...
- Publication number 20080020512
- Publication date Jan 24, 2008
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING WIRE BOND INTERCONNECT BE...
- Publication number 20070292990
- Publication date Dec 20, 2007
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor multipackage module including die and inverted land g...
- Publication number 20070278658
- Publication date Dec 6, 2007
- STATS ChipPAC Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plastic Ball Grid Array Package with Integral Heatsink
- Publication number 20070176289
- Publication date Aug 2, 2007
- ChipPAC, Inc.
- Taekeun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Multi-Package Module Having Package Stacked Over Ball...
- Publication number 20070155053
- Publication date Jul 5, 2007
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Stacked Multi-Package Module Having Inverted Second P...
- Publication number 20070114648
- Publication date May 24, 2007
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Multi-Package Module Having Inverted Land Grid Array...
- Publication number 20070117267
- Publication date May 24, 2007
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Multi-Package Module Having Inverted Second Package S...
- Publication number 20070111388
- Publication date May 17, 2007
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Semiconductor Package having Adhesive/Spacer Structure and...
- Publication number 20070018296
- Publication date Jan 25, 2007
- ChipPAC, Inc.
- Hyeog Chan Kwon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Stacked Semiconductor Package having Adhesive/Spacer Structure and...
- Publication number 20070013060
- Publication date Jan 18, 2007
- ChipPAC, Inc.
- Hyeog Chan Kwon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Module Having Stacked Chip Scale Semiconductor Packages
- Publication number 20060284299
- Publication date Dec 21, 2006
- STATS ChipPAC Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multiple Chip Package Module Including Die Stacked Over Encapsulate...
- Publication number 20060249851
- Publication date Nov 9, 2006
- STATS ChipPAC Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package including second substrate and having exposed...
- Publication number 20060244117
- Publication date Nov 2, 2006
- STATS ChipPAC, Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor multipackage module including tape substrate land gri...
- Publication number 20060226536
- Publication date Oct 12, 2006
- STATS ChipPAC Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor stacked package assembly having exposed substrate sur...
- Publication number 20060220209
- Publication date Oct 5, 2006
- STATS ChipPAC Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor assembly including chip scale package and second subs...
- Publication number 20060220210
- Publication date Oct 5, 2006
- STATS ChipPAC Ltd.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor multi-package module having inverted second package s...
- Publication number 20060172459
- Publication date Aug 3, 2006
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor stacked multi-package module having inverted second p...
- Publication number 20060172461
- Publication date Aug 3, 2006
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor multi-package module having wire bond interconnect be...
- Publication number 20060172463
- Publication date Aug 3, 2006
- ChipPAC, Inc.
- Marcos Karnezos
- H01 - BASIC ELECTRIC ELEMENTS

Marcos Karnezos

Person

Patents Grantslast 30 patents

Semiconductor multi-package module including tape substrate land gr...

Multiple chip package module having inverted package stacked over die

Adhesive/spacer island structure for stacking over wire bonded die

Semiconductor multi-package module including tape substrate land gr...

Method of fabricating a semiconductor multi-package module having w...

Plastic ball grid array package with integral heatsink

Stacked semiconductor package having adhesive/spacer structure and...

Semiconductor multi-package module having package stacked over die-...

Integrated circuit package system including shield

Method for making semiconductor multipackage module including die a...

Method of fabricating a semiconductor multipackage module including...

Flip chip interconnection

Semiconductor multi-package module having package stacked over die-...

Integrated circuit package system including shield

Semiconductor multipackage module including die and inverted land g...

Method of fabricating a semiconductor multi package module having a...

Semiconductor multi-package module having package stacked over die-...

Method of fabricating module having stacked chip scale semiconducto...

Semiconductor multi-package module having package stacked over ball...

Semiconductor multipackage module including tape substrate land gri...

Multiple chip package module including die stacked over encapsulate...

Method for making a semiconductor multi-package module having inver...

Semiconductor assembly including chip scale package and second subs...

Semiconductor package including second substrate and having exposed...

Module having stacked chip scale semiconductor packages

Semiconductor stacked package assembly having exposed substrate sur...

Method of fabricating a semiconductor multi-package module having i...

Method of fabricating a semiconductor assembly including chip scale...

Method of fabricating a semiconductor multi-package module having a...

Method for making a semiconductor multipackage module including a p...

Patents Applicationslast 30 patents

Flip-chip underfill

INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING SHIELD

SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING PACKAGE STACKED OVER DIE-...

METHOD FOR MAKING SEMICONDUCTOR MULTIPACKAGE MODULE INCLUDING DIE A...

SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GR...

Flip chip interconnection

Method for making a semiconductor multipackage module including a p...

MODULE HAVING STACKED CHIP SCALE SEMICONDUCTOR PACKAGES

SEMICONDUCTOR MULTI-PACKAGE MODULE INCLUDING TAPE SUBSTRATE LAND GR...

METHOD OF FABRICATING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING I...

Semiconductor Multi-Package Module Having Package Stacked Over Die-...

Method for making a semiconductor multi-package module having inver...

SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING WIRE BOND INTERCONNECT BE...

Semiconductor multipackage module including die and inverted land g...

Plastic Ball Grid Array Package with Integral Heatsink

Semiconductor Multi-Package Module Having Package Stacked Over Ball...

Semiconductor Stacked Multi-Package Module Having Inverted Second P...

Semiconductor Multi-Package Module Having Inverted Land Grid Array...

Semiconductor Multi-Package Module Having Inverted Second Package S...

Stacked Semiconductor Package having Adhesive/Spacer Structure and...

Stacked Semiconductor Package having Adhesive/Spacer Structure and...

Module Having Stacked Chip Scale Semiconductor Packages

Multiple Chip Package Module Including Die Stacked Over Encapsulate...

Semiconductor package including second substrate and having exposed...

Semiconductor multipackage module including tape substrate land gri...

Semiconductor stacked package assembly having exposed substrate sur...

Semiconductor assembly including chip scale package and second subs...

Semiconductor multi-package module having inverted second package s...

Semiconductor stacked multi-package module having inverted second p...

Semiconductor multi-package module having wire bond interconnect be...