Martin Gerhardt

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Transistor element with reduced lateral electrical field
- Patent number 10,580,863
- Issue date Mar 3, 2020
- GLOBALFOUNDRIES Inc.
- Damien Angot
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure including a plurality of pairs of nonvolati...
- Patent number 10,529,728
- Issue date Jan 7, 2020
- GLOBALFOUNDRIES Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Heat dissipative element for polysilicon resistor bank
- Patent number 10,256,134
- Issue date Apr 9, 2019
- GLOBALFOUNDRIES Inc.
- Ricardo P. Mikalo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure including a plurality of pairs of nonvolati...
- Patent number 9,922,986
- Issue date Mar 20, 2018
- GLOBALFOUNDRIES Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
OPC enlarged dummy electrode to eliminate ski slope at eSiGe
- Patent number 9,461,145
- Issue date Oct 4, 2016
- GLOBALFOUNDRIES Inc.
- Ran Yan
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Transistor devices with high-k insulation layers
- Patent number 9,425,194
- Issue date Aug 23, 2016
- GLOBALFOUNDRIES Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for manufacturing semiconductor devices comprising transi...
- Patent number 9,219,013
- Issue date Dec 22, 2015
- GLOBALFOUNDRIES Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming transistor devices with high-k insulation layers...
- Patent number 9,136,177
- Issue date Sep 15, 2015
- GLOBALFOUNDRIES Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a strained transistor by stress memorization bas...
- Patent number 9,117,929
- Issue date Aug 25, 2015
- GLOBALFOUNDRIES Inc.
- Frank Wirbeleit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Shallow source and drain architecture in an active region of a semi...
- Patent number 8,614,134
- Issue date Dec 24, 2013
- GLOBALFOUNDRIES Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for enhancing transistor performance by transistor specif...
- Patent number 8,541,885
- Issue date Sep 24, 2013
- GLOBALFOUNDRIES Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced confinement of high-K metal gate electrode structures by r...
- Patent number 8,349,694
- Issue date Jan 8, 2013
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of enhancing lithography capabilities during gate formation...
- Patent number 8,101,512
- Issue date Jan 24, 2012
- GLOBALFOUNDRIES Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced stress transfer in an interlayer dielectric by using an ad...
- Patent number 7,994,059
- Issue date Aug 9, 2011
- Advanced Micro Devices, Inc.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a strained transistor by stress memorization bas...
- Patent number 7,964,458
- Issue date Jun 21, 2011
- GLOBALFOUNDRIES Inc.
- Frank Wirbeleit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for enhancing transistor performance by transistor specif...
- Patent number 7,964,970
- Issue date Jun 21, 2011
- GLOBALFOUNDRIES, INC.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for strain engineering in silicon-based transistors by us...
- Patent number 7,871,877
- Issue date Jan 18, 2011
- GLOBALFOUNDRIES Inc.
- Uwe Griebenow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of increasing transistor drive current by recessing an isola...
- Patent number 7,659,170
- Issue date Feb 9, 2010
- GLOBALFOUNDRIES, INC.
- Christoph Schwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for transferring strain into a semiconductor region
- Patent number 7,494,906
- Issue date Feb 24, 2009
- Advanced Micro Devices, Inc.
- Thorsten Kammler
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating a stressed MOS device
- Patent number 7,462,524
- Issue date Dec 9, 2008
- Advanced Micro Devices, Inc.
- Igor Peidous
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating a CMOS device including silicide contacts
- Patent number 7,348,233
- Issue date Mar 25, 2008
- Advanced Micro Devices, Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TRANSISTOR ELEMENT WITH REDUCED LATERAL ELECTRICAL FIELD
- Publication number 20190109192
- Publication date Apr 11, 2019
- GLOBALFOUNDRIES INC.
- Damien Angot
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HEAT DISSIPATIVE ELEMENT FOR POLYSILICON RESISTOR BANK
- Publication number 20180358259
- Publication date Dec 13, 2018
- GLOBALFOUNDRIES Inc.
- Ricardo P. Mikalo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE INCLUDING A PLURALITY OF PAIRS OF NONVOLATI...
- Publication number 20180158833
- Publication date Jun 7, 2018
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE INCLUDING A PLURALITY OF PAIRS OF NONVOLATI...
- Publication number 20170330889
- Publication date Nov 16, 2017
- GLOBALFOUNDRIES INC.
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPC ENLARGED DUMMY ELECTRODE TO ELIMINATE SKI SLOPE AT ESIGE
- Publication number 20160099336
- Publication date Apr 7, 2016
- GLOBALFOUNDRIES INC.
- Ran YAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR DEVICES WITH HIGH-K INSULATION LAYERS
- Publication number 20150340362
- Publication date Nov 26, 2015
- GLOBALFOUNDRIES INC.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUE FOR MANUFACTURING SEMICONDUCTOR DEVICES COMPRISING TRANSI...
- Publication number 20140273370
- Publication date Sep 18, 2014
- GLOBAL FOUNDRIES Inc.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS HAVING BORON-DOPED SILICON GERMANIUM CHANNELS A...
- Publication number 20140070321
- Publication date Mar 13, 2014
- GLOBALFOUNDRIES INC.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING TRANSISTOR DEVICES WITH HIGH-K INSULATION LAYERS...
- Publication number 20140027859
- Publication date Jan 30, 2014
- GLOBALFOUNDRIES INC.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming Source/Drain Regions on Transistor Devices
- Publication number 20130095627
- Publication date Apr 18, 2013
- GLOBALFOUNDRIES INC.
- Stefan Flachowsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Shallow Source and Drain Architecture in an Active Region of a Semi...
- Publication number 20120241864
- Publication date Sep 27, 2012
- GLOBALFOUNDRIES Dresden Module One Limited Liability Company & Co. KG
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming a Strained Transistor by Stress Memorization Bas...
- Publication number 20110223733
- Publication date Sep 15, 2011
- GLOBALFOUNDRIES INC.
- Frank Wirbeleit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Technique for Enhancing Transistor Performance by Transistor Specif...
- Publication number 20110215415
- Publication date Sep 8, 2011
- GLOBALFOUNDRIES INC.
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED CONFINEMENT OF HIGH-K METAL GATE ELECTRODE STRUCTURES BY R...
- Publication number 20110159654
- Publication date Jun 30, 2011
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE WITH SELF-ALIGNED STR...
- Publication number 20100047985
- Publication date Feb 25, 2010
- Advanced Micro Devices, Inc.
- Srikanteswara DAKSHINA MURTHY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUE FOR STRAIN ENGINEERING IN SILICON-BASED TRANSISTORS BY US...
- Publication number 20080296692
- Publication date Dec 4, 2008
- Uwe Griebenow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUE FOR ENHANCING TRANSISTOR PERFORMANCE BY TRANSISTOR SPECIF...
- Publication number 20080265330
- Publication date Oct 30, 2008
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENHANCED STRESS TRANSFER IN AN INTERLAYER DIELECTRIC BY USING AN AD...
- Publication number 20080179661
- Publication date Jul 31, 2008
- Ralf Richter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A STRAINED TRANSISTOR BY STRESS MEMORIZATION BAS...
- Publication number 20080026572
- Publication date Jan 31, 2008
- Frank Wirbeleit
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF ENHANCING LITHOGRAPHY CAPABILITIES DURING GATE FORMATION...
- Publication number 20080026552
- Publication date Jan 31, 2008
- Martin Gerhardt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF INCREASING TRANSISTOR DRIVE CURRENT BY RECESSING AN ISOLA...
- Publication number 20070278596
- Publication date Dec 6, 2007
- Christoph Schwan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING ULTRA-SHALLOW HIGH QUALITY JUNCTIONS BY A COMBIN...
- Publication number 20070232033
- Publication date Oct 4, 2007
- Karsten Wieczorek
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Technique for transferring strain into a semiconductor region
- Publication number 20060003510
- Publication date Jan 5, 2006
- Thorsten Kammler
- H01 - BASIC ELECTRIC ELEMENTS

Martin Gerhardt

Person

Patents Grantslast 30 patents

Transistor element with reduced lateral electrical field

Semiconductor structure including a plurality of pairs of nonvolati...

Heat dissipative element for polysilicon resistor bank

Semiconductor structure including a plurality of pairs of nonvolati...

OPC enlarged dummy electrode to eliminate ski slope at eSiGe

Transistor devices with high-k insulation layers

Technique for manufacturing semiconductor devices comprising transi...

Methods of forming transistor devices with high-k insulation layers...

Method for forming a strained transistor by stress memorization bas...

Shallow source and drain architecture in an active region of a semi...

Technique for enhancing transistor performance by transistor specif...

Enhanced confinement of high-K metal gate electrode structures by r...

Method of enhancing lithography capabilities during gate formation...

Enhanced stress transfer in an interlayer dielectric by using an ad...

Method for forming a strained transistor by stress memorization bas...

Technique for enhancing transistor performance by transistor specif...

Technique for strain engineering in silicon-based transistors by us...

Method of increasing transistor drive current by recessing an isola...

Technique for transferring strain into a semiconductor region

Methods for fabricating a stressed MOS device

Methods for fabricating a CMOS device including silicide contacts

Patents Applicationslast 30 patents

TRANSISTOR ELEMENT WITH REDUCED LATERAL ELECTRICAL FIELD

HEAT DISSIPATIVE ELEMENT FOR POLYSILICON RESISTOR BANK

SEMICONDUCTOR STRUCTURE INCLUDING A PLURALITY OF PAIRS OF NONVOLATI...

SEMICONDUCTOR STRUCTURE INCLUDING A PLURALITY OF PAIRS OF NONVOLATI...

OPC ENLARGED DUMMY ELECTRODE TO ELIMINATE SKI SLOPE AT ESIGE

TRANSISTOR DEVICES WITH HIGH-K INSULATION LAYERS

TECHNIQUE FOR MANUFACTURING SEMICONDUCTOR DEVICES COMPRISING TRANSI...

INTEGRATED CIRCUITS HAVING BORON-DOPED SILICON GERMANIUM CHANNELS A...

METHODS OF FORMING TRANSISTOR DEVICES WITH HIGH-K INSULATION LAYERS...

Methods of Forming Source/Drain Regions on Transistor Devices

Shallow Source and Drain Architecture in an Active Region of a Semi...

Method for Forming a Strained Transistor by Stress Memorization Bas...

Technique for Enhancing Transistor Performance by Transistor Specif...

ENHANCED CONFINEMENT OF HIGH-K METAL GATE ELECTRODE STRUCTURES BY R...

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE WITH SELF-ALIGNED STR...

TECHNIQUE FOR STRAIN ENGINEERING IN SILICON-BASED TRANSISTORS BY US...

TECHNIQUE FOR ENHANCING TRANSISTOR PERFORMANCE BY TRANSISTOR SPECIF...

ENHANCED STRESS TRANSFER IN AN INTERLAYER DIELECTRIC BY USING AN AD...

METHOD FOR FORMING A STRAINED TRANSISTOR BY STRESS MEMORIZATION BAS...

METHOD OF ENHANCING LITHOGRAPHY CAPABILITIES DURING GATE FORMATION...

METHOD OF INCREASING TRANSISTOR DRIVE CURRENT BY RECESSING AN ISOLA...

METHOD FOR FORMING ULTRA-SHALLOW HIGH QUALITY JUNCTIONS BY A COMBIN...

Technique for transferring strain into a semiconductor region