Michael A. Fetterman

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for combining micro-operations to process imme...
- Patent number 7,941,651
- Issue date May 10, 2011
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load mechanism
- Patent number 7,457,932
- Issue date Nov 25, 2008
- Intel Corporation
- Per Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flow optimization and prediction for VSSE memory operations
- Patent number 7,404,065
- Issue date Jul 22, 2008
- Intel Corporation
- Stephan Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for representation of an address in canonical...
- Patent number 7,103,751
- Issue date Sep 5, 2006
- Intel Corporation
- Bret L. Toll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for pipeline streamlining where resources are...
- Patent number 6,393,550
- Issue date May 21, 2002
- Intel Corporation
- Michael A. Fetterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maximum throughput scheduling of dependent...
- Patent number 6,101,597
- Issue date Aug 8, 2000
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor that redirects an instruction fetch pipeline immediately...
- Patent number 6,079,014
- Issue date Jun 20, 2000
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flag renaming and flag masks within register alias table
- Patent number 6,047,369
- Issue date Apr 4, 2000
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exception handling in a processor that performs speculative out-of-...
- Patent number 5,987,600
- Issue date Nov 16, 1999
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for efficiently overlapping multiple operand types in a m...
- Patent number 5,974,523
- Issue date Oct 26, 1999
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Segment register renaming in an out of order processor
- Patent number 5,951,670
- Issue date Sep 14, 1999
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a set-associative branch targ...
- Patent number 5,944,817
- Issue date Aug 31, 1999
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing address-size backward compatibil...
- Patent number 5,913,050
- Issue date Jun 15, 1999
- Intel Corporation
- Darrell D. Boggs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a branch target buffer in CIS...
- Patent number 5,903,751
- Issue date May 11, 1999
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating event handler vectors based on...
- Patent number 5,889,982
- Issue date Mar 30, 1999
- Intel Corporation
- Scott Dion Rodgers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for scheduling instructions by predicting future...
- Patent number 5,842,036
- Issue date Nov 24, 1998
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register alias table update to indicate architecturally visible state
- Patent number 5,826,094
- Issue date Oct 20, 1998
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual prediction branch system having two step of branch recovery pr...
- Patent number 5,812,839
- Issue date Sep 22, 1998
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for scheduling instructions by predicting future...
- Patent number 5,809,325
- Issue date Sep 15, 1998
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for changing flow of control in a processor
- Patent number 5,809,271
- Issue date Sep 15, 1998
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for determining operating characteristics of...
- Patent number 5,778,407
- Issue date Jul 7, 1998
- Intel Corporation
- Andrew F. Glew
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamic allocation of multiple buffers in...
- Patent number 5,778,245
- Issue date Jul 7, 1998
- Intel Corporation
- David B. Papworth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for predicting and handling resolving return f...
- Patent number 5,768,576
- Issue date Jun 16, 1998
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system with self-consistent ordering mechanism
- Patent number 5,751,986
- Issue date May 12, 1998
- Intel Corporation
- Michael A. Fetterman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction pointer limits in processor that performs speculative o...
- Patent number 5,740,393
- Issue date Apr 14, 1998
- Intel Corporation
- Rohit A. Vidwans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for predicting, clearing and redirecting unpre...
- Patent number 5,729,728
- Issue date Mar 17, 1998
- Intel Corporation
- Robert P. Colwell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for pipeline processing of instructions by controlling acces...
- Patent number 5,721,855
- Issue date Feb 24, 1998
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dispatching and executing a load operation...
- Patent number 5,717,882
- Issue date Feb 10, 1998
- Intel Corporation
- Jeffrey M. Abramson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a set-associative branch targ...
- Patent number 5,706,492
- Issue date Jan 6, 1998
- Intel Corporation
- Bradley D. Hoyt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for maintaining a macro instruction for refetc...
- Patent number 5,687,338
- Issue date Nov 11, 1997
- Intel Corporation
- Darrell D. Boggs
- G06 - COMPUTING CALCULATING COUNTING

Michael A. Fetterman

Person

Patents Grantslast 30 patents

Method and apparatus for combining micro-operations to process imme...

Load mechanism

Flow optimization and prediction for VSSE memory operations

Method and apparatus for representation of an address in canonical...

Method and apparatus for pipeline streamlining where resources are...

Method and apparatus for maximum throughput scheduling of dependent...

Processor that redirects an instruction fetch pipeline immediately...

Flag renaming and flag masks within register alias table

Exception handling in a processor that performs speculative out-of-...

Mechanism for efficiently overlapping multiple operand types in a m...

Segment register renaming in an out of order processor

Method and apparatus for implementing a set-associative branch targ...

Method and apparatus for providing address-size backward compatibil...

Method and apparatus for implementing a branch target buffer in CIS...

Method and apparatus for generating event handler vectors based on...

Circuit and method for scheduling instructions by predicting future...

Register alias table update to indicate architecturally visible state

Dual prediction branch system having two step of branch recovery pr...

Circuit and method for scheduling instructions by predicting future...

Method and apparatus for changing flow of control in a processor

Methods and apparatus for determining operating characteristics of...

Method and apparatus for dynamic allocation of multiple buffers in...

Method and apparatus for predicting and handling resolving return f...

Computer system with self-consistent ordering mechanism

Instruction pointer limits in processor that performs speculative o...

Method and apparatus for predicting, clearing and redirecting unpre...

Method for pipeline processing of instructions by controlling acces...

Method and apparatus for dispatching and executing a load operation...

Method and apparatus for implementing a set-associative branch targ...

Method and apparatus for maintaining a macro instruction for refetc...