Napoleon W. Lee

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Overridable data protection mechanism for PLDs
- Patent number 5,991,880
- Issue date Nov 23, 1999
- Xilinx, Inc.
- Derek R. Curd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient in-system programming structure and method for non-volati...
- Patent number 5,949,987
- Issue date Sep 7, 1999
- Xilinx, Inc.
- Derek R. Curd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overridable data protection mechanism for PLDs
- Patent number 5,838,901
- Issue date Nov 17, 1998
- Xilinx, Inc.
- Derek R. Curd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable performance-optimized programmable logic device
- Patent number 5,801,548
- Issue date Sep 1, 1998
- Napoleon W. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit for partially reprogramming an operational programmable log...
- Patent number 5,764,076
- Issue date Jun 9, 1998
- Xilinx, Inc.
- Napoleon W. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient in-system programming structure and method for non-volati...
- Patent number 5,734,868
- Issue date Mar 31, 1998
- Derek R. Curd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reset circuit for a programmable logic device
- Patent number 5,689,516
- Issue date Nov 18, 1997
- Xilinx, Inc.
- Ronald J. Mack
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device with configurable power supply
- Patent number 5,661,685
- Issue date Aug 26, 1997
- Xilinx, Inc.
- Napoleon W. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sense amplifier for programmable logic device having selectable pow...
- Patent number 5,631,583
- Issue date May 20, 1997
- Xilinx, Inc.
- Napoleon W. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing coupling switching noise in inter...
- Patent number 5,617,041
- Issue date Apr 1, 1997
- Xilinx, Inc.
- Napoleon W. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexed by-passable memory devices with increased speed and imp...
- Patent number 5,570,051
- Issue date Oct 29, 1996
- Xilinx, Inc.
- David Chiang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Macrocell with product-term cascade and improved flip flop utilization
- Patent number 5,565,792
- Issue date Oct 15, 1996
- Xilinx, Inc.
- David Chiang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wordline driver for flash PLD
- Patent number 5,563,827
- Issue date Oct 8, 1996
- Xilinx, Inc.
- Napoleon W. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier having selectable power and speed modes
- Patent number 5,530,384
- Issue date Jun 25, 1996
- Xilinx, Inc.
- Napoleon W. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power memory device with accelerated sense amplifiers
- Patent number 5,526,322
- Issue date Jun 11, 1996
- Xilinx, Inc.
- Napoleon W. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Power saving sense amplifier that mimics non-toggling bitline states
- Patent number 5,524,097
- Issue date Jun 4, 1996
- Xilinx, Inc.
- Napoleon W. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Power-on reset circuit including dual sense amplifiers
- Patent number 5,394,104
- Issue date Feb 28, 1995
- Xilinx, Inc.
- Napoleon W. Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Macrocell with product-term cascade and improved flip flop utilization
- Patent number 5,357,153
- Issue date Oct 18, 1994
- Xilinx, Inc.
- David Chiang
- H03 - BASIC ELECTRONIC CIRCUITRY

Napoleon W. Lee

Person

Patents Grantslast 30 patents

Overridable data protection mechanism for PLDs

Efficient in-system programming structure and method for non-volati...

Overridable data protection mechanism for PLDs

Configurable performance-optimized programmable logic device

Circuit for partially reprogramming an operational programmable log...

Efficient in-system programming structure and method for non-volati...

Reset circuit for a programmable logic device

Programmable logic device with configurable power supply

Sense amplifier for programmable logic device having selectable pow...

Method and apparatus for reducing coupling switching noise in inter...

Multiplexed by-passable memory devices with increased speed and imp...

Macrocell with product-term cascade and improved flip flop utilization

Wordline driver for flash PLD

Sense amplifier having selectable power and speed modes

Low-power memory device with accelerated sense amplifiers

Power saving sense amplifier that mimics non-toggling bitline states

Power-on reset circuit including dual sense amplifiers

Macrocell with product-term cascade and improved flip flop utilization