Richard C. Foss

Person

Kirkcaldy Fife, GB

People

Patents Grantslast 30 patents

Information Patent Grant
Embedded memory databus architecture
- Patent number 8,441,878
- Issue date May 14, 2013
- MOSAID Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded memory databus architecture
- Patent number 8,218,386
- Issue date Jul 10, 2012
- MOSAID Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded memory databus architecture
- Patent number 7,859,930
- Issue date Dec 28, 2010
- MOSAID Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded memory databus architecture
- Patent number 7,609,573
- Issue date Oct 27, 2009
- MOSAID Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Wide databus architecture
- Patent number 7,486,580
- Issue date Feb 3, 2009
- Mosaid Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Wide databus architecture
- Patent number 7,095,666
- Issue date Aug 22, 2006
- Mosaid Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
DRAM boosted voltage supply
- Patent number 6,980,448
- Issue date Dec 27, 2005
- Mosaid Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory cell
- Patent number 6,888,730
- Issue date May 3, 2005
- Mosaid Technologies Incorporated
- Richard Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for replacing defective rows in a semiconducto...
- Patent number 6,888,731
- Issue date May 3, 2005
- Mosaid Technologies Incorporated
- Alan Roth
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory cell having improved layout
- Patent number 6,873,532
- Issue date Mar 29, 2005
- Mosaid Technologies Incorporated
- Richard Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
High density memory cell
- Patent number 6,751,111
- Issue date Jun 15, 2004
- Mosaid Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Wide databus architecture
- Patent number 6,661,723
- Issue date Dec 9, 2003
- Mosaid Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory boosted voltage supply
- Patent number 6,614,705
- Issue date Sep 2, 2003
- Mosaid Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Priority encoder circuit and method for content addressable memory
- Patent number 6,580,652
- Issue date Jun 17, 2003
- Richard C. Foss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Content addressable memory cell having improved layout
- Patent number 6,522,562
- Issue date Feb 18, 2003
- Mosaid Technologies Incorporated
- Richard Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory using imperfect isolating transistors
- Patent number RE37641
- Issue date Apr 9, 2002
- Mosaid Technologies Incorporated
- Richard C. Foss
- 365 - Static information storage and retrieval
Information Patent Grant
Wide databus architecture
- Patent number 6,366,491
- Issue date Apr 2, 2002
- Mosaid Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage boosted word line supply charge pump and regulator for...
- Patent number 6,236,581
- Issue date May 22, 2001
- Mosaid Technologies Incorporated
- Richard C. Foss
- G05 - CONTROLLING REGULATING
Information Patent Grant
Wide database architecture
- Patent number 6,195,282
- Issue date Feb 27, 2001
- Mosaid Technologies, Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage boosted word line supply charge pump and regulator for...
- Patent number 6,055,201
- Issue date Apr 25, 2000
- Mosaid Technologies Incorporated
- Richard C. Foss
- G05 - CONTROLLING REGULATING
Information Patent Grant
Enhanced ASIC process cell
- Patent number 5,870,329
- Issue date Feb 9, 1999
- Mosaid Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage boosted word line supply charge pump and regulator for...
- Patent number 5,828,620
- Issue date Oct 27, 1998
- Mosaid Technologies Incorporated
- Richard C. Foss
- G05 - CONTROLLING REGULATING
Information Patent Grant
Digital memory testing method
- Patent number 5,822,333
- Issue date Oct 13, 1998
- Mosaid Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Wide databus architecture
- Patent number 5,742,544
- Issue date Apr 21, 1998
- Mosaid Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Repeater with threshold modulation
- Patent number 5,724,304
- Issue date Mar 3, 1998
- Mosaid Technologies Incorporated
- Richard C. Foss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Repeater with threshold modulation
- Patent number 5,703,508
- Issue date Dec 30, 1997
- Mosaid Technologies Incorporated
- Richard C. Foss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High voltage boosted word line supply charge pump and regulator for...
- Patent number 5,699,313
- Issue date Dec 16, 1997
- Mosaid Technologies Incorporated
- Richard C. Foss
- G05 - CONTROLLING REGULATING
Information Patent Grant
Repeater with threshold modulation
- Patent number 5,576,649
- Issue date Nov 19, 1996
- Mosaid Technologies Incorporated
- Richard C. Foss
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for DRAM sensing current control
- Patent number 5,574,681
- Issue date Nov 12, 1996
- Mosaid Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Grant
Flip-flop circuit having low standby power for driving synchronous...
- Patent number 5,497,115
- Issue date Mar 5, 1996
- Mosaid Technologies Incorporated
- Bruce Millar
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Embedded Memory Databus Architecture
- Publication number 20130003478
- Publication date Jan 3, 2013
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
Embedded Memory Databus Architecture
- Publication number 20110211409
- Publication date Sep 1, 2011
- MOSAID TECHNOLOGIES INCORPORATED
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
Embedded Memory Databus Architecture
- Publication number 20100128546
- Publication date May 27, 2010
- Mosaid Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
Wide databus architecture
- Publication number 20090073792
- Publication date Mar 19, 2009
- MOSAID Technologies, Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM boosted voltage supply
- Publication number 20070200611
- Publication date Aug 30, 2007
- Richard C. Foss
- G05 - CONTROLLING REGULATING
Information Patent Application
Wide databus architecture
- Publication number 20070047356
- Publication date Mar 1, 2007
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM boosted voltage supply
- Publication number 20060028899
- Publication date Feb 9, 2006
- MOSAID Technologies Incorporated
- Richard C. Foss
- G05 - CONTROLLING REGULATING
Information Patent Application
Wide databus architecture
- Publication number 20040136226
- Publication date Jul 15, 2004
- MOSAID Technologies Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for replacing defective rows in a semiconducto...
- Publication number 20040105289
- Publication date Jun 3, 2004
- Alan Roth
- G11 - INFORMATION STORAGE
Information Patent Application
Boosted voltage supply
- Publication number 20040036456
- Publication date Feb 26, 2004
- MOSAID Technologies Incorporated
- Richard C. Foss
- G05 - CONTROLLING REGULATING
Information Patent Application
Content addressable memory cell having improved layout
- Publication number 20030161173
- Publication date Aug 28, 2003
- Richard Foss
- G11 - INFORMATION STORAGE
Information Patent Application
Wide databus architecture
- Publication number 20030133347
- Publication date Jul 17, 2003
- MOSAID Technologies Inc.
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
PRIORITY ENCODER CIRCUIT AND METHOD FOR CONTENT ADDRESSABLE MEMORY
- Publication number 20030081481
- Publication date May 1, 2003
- Richard C. Foss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High density memory cell
- Publication number 20030035331
- Publication date Feb 20, 2003
- Richard C. Foss
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Content addressable memory cell
- Publication number 20020141218
- Publication date Oct 3, 2002
- Richard Foss
- G11 - INFORMATION STORAGE
Information Patent Application
Content addressable memory cell
- Publication number 20020126519
- Publication date Sep 12, 2002
- Richard Foss
- G11 - INFORMATION STORAGE
Information Patent Application
Wide databus architecture
- Publication number 20020067635
- Publication date Jun 6, 2002
- MOSAID Technologies Incorporated
- Richard C. Foss
- G11 - INFORMATION STORAGE
Information Patent Application
High voltage boosted word line supply charge pump and regulator for...
- Publication number 20010009518
- Publication date Jul 26, 2001
- MOSAID Technologies Incorporated
- Richard C. Foss
- G05 - CONTROLLING REGULATING

Richard C. Foss

Person

Patents Grantslast 30 patents

Embedded memory databus architecture

Embedded memory databus architecture

Embedded memory databus architecture

Embedded memory databus architecture

Wide databus architecture

Wide databus architecture

DRAM boosted voltage supply

Content addressable memory cell

Method and apparatus for replacing defective rows in a semiconducto...

Content addressable memory cell having improved layout

High density memory cell

Wide databus architecture

Dynamic random access memory boosted voltage supply

Priority encoder circuit and method for content addressable memory

Content addressable memory cell having improved layout

Dynamic random access memory using imperfect isolating transistors

Wide databus architecture

High voltage boosted word line supply charge pump and regulator for...

Wide database architecture

High voltage boosted word line supply charge pump and regulator for...

Enhanced ASIC process cell

High voltage boosted word line supply charge pump and regulator for...

Digital memory testing method

Wide databus architecture

Repeater with threshold modulation

Repeater with threshold modulation

High voltage boosted word line supply charge pump and regulator for...

Repeater with threshold modulation

Method for DRAM sensing current control

Flip-flop circuit having low standby power for driving synchronous...

Patents Applicationslast 30 patents

Embedded Memory Databus Architecture

Embedded Memory Databus Architecture

Embedded Memory Databus Architecture

Wide databus architecture

DRAM boosted voltage supply

Wide databus architecture

DRAM boosted voltage supply

Wide databus architecture

Method and apparatus for replacing defective rows in a semiconducto...

Boosted voltage supply

Content addressable memory cell having improved layout

Wide databus architecture

PRIORITY ENCODER CIRCUIT AND METHOD FOR CONTENT ADDRESSABLE MEMORY

High density memory cell

Content addressable memory cell

Content addressable memory cell

Wide databus architecture

High voltage boosted word line supply charge pump and regulator for...