Membership
Tour
Register
Log in
Robert S. Pauley Jr.
Follow
Person
Mission Viejo, CA, US
People
Overview
Industries
Organizations
People
Information
Impact
Patents Grants
last 30 patents
Information
Patent Grant
High density memory module system
Patent number
10,573,354
Issue date
Feb 25, 2020
SMART Modular Technologies, Inc.
Satyanarayan Shivkumar Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Extended capacity memory system with load relieved memory and metho...
Patent number
9,939,855
Issue date
Apr 10, 2018
SMART Modular Technologies, Inc.
Victor Mahran
G11 - INFORMATION STORAGE
Information
Patent Grant
Integrated circuit device system with elevated stacked configuratio...
Patent number
9,648,754
Issue date
May 9, 2017
SMART Modular Technologies, Inc.
Satyanarayan Shivkumar Iyer
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Extended capacity memory system with load relieved memory and metho...
Patent number
9,204,550
Issue date
Dec 1, 2015
SMART Modular Technologies, Inc.
Victor Mahran
G11 - INFORMATION STORAGE
Information
Patent Grant
Module having at least one thermally conductive layer between print...
Patent number
8,971,045
Issue date
Mar 3, 2015
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Memory module with vertically accessed interposer assemblies
Patent number
8,379,391
Issue date
Feb 19, 2013
SMART Modular Technologies, Inc.
Mike H. Amidi
G11 - INFORMATION STORAGE
Information
Patent Grant
Module having at least two surfaces and at least one thermally cond...
Patent number
8,345,427
Issue date
Jan 1, 2013
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Module having at least two surfaces and at least one thermally cond...
Patent number
7,839,645
Issue date
Nov 23, 2010
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
High density module having at least two substrates and at least one...
Patent number
7,630,202
Issue date
Dec 8, 2009
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
High density memory module using stacked printed circuit boards
Patent number
7,375,970
Issue date
May 20, 2008
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
High density memory module using stacked printed circuit boards
Patent number
7,254,036
Issue date
Aug 7, 2007
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Grant
Arrangement of integrated circuits in a memory module
Patent number
6,751,113
Issue date
Jun 15, 2004
Netlist, Inc.
Jayesh R. Bhakta
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Patents Applications
last 30 patents
Information
Patent Application
HIGH DENSITY MEMORY MODULE SYSTEM
Publication number
20180081554
Publication date
Mar 22, 2018
SMART Modular Technologies, Inc.
Satyanarayan Shivkumar Iyer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
EXTENDED CAPACITY MEMORY SYSTEM WITH LOAD RELIEVED MEMORY AND METHO...
Publication number
20160070316
Publication date
Mar 10, 2016
SMART Modular Technologies, Inc.
Victor Mahran
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
EXTENDED CAPACITY MEMORY SYSTEM WITH LOAD RELIEVED MEMORY AND METHO...
Publication number
20130083473
Publication date
Apr 4, 2013
SMART Modular Technologies, Inc.
Victor Mahran
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
MODULE HAVING AT LEAST TWO SURFACES AND AT LEAST ONE THERMALLY COND...
Publication number
20110110047
Publication date
May 12, 2011
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
MODULE HAVING AT LEAST TWO SURFACES AND AT LEAST ONE THERMALLY COND...
Publication number
20100110642
Publication date
May 6, 2010
Netlist, Inc.
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Memory Module with Vertically Accessed Interposer Assemblies
Publication number
20090279243
Publication date
Nov 12, 2009
Mike H. Amidi
G11 - INFORMATION STORAGE
Information
Patent Application
HIGH DENSITY MODULE HAVING AT LEAST TWO SUBSTRATES AND AT LEAST ONE...
Publication number
20080316712
Publication date
Dec 25, 2008
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
HIGH DENSITY MEMORY MODULE USING STACKED PRINTED CIRCUIT BOARDS
Publication number
20080007921
Publication date
Jan 10, 2008
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
High density memory module using stacked printed circuit boards
Publication number
20060044749
Publication date
Mar 2, 2006
Robert S. Pauley
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Printed circuit board memory module with embedded passive components
Publication number
20050094465
Publication date
May 5, 2005
NETLIST INC.
William M. Gervasi
H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information
Patent Application
Memory device load simulator
Publication number
20050086037
Publication date
Apr 21, 2005
Robert S. Pauley
G11 - INFORMATION STORAGE
Information
Patent Application
Non-standard dual in-line memory modules with more than two ranks o...
Publication number
20050044302
Publication date
Feb 24, 2005
Robert S. Pauley
G11 - INFORMATION STORAGE
Information
Patent Application
ARRANGEMENT OF INTEGRATED CIRCUITS IN A MEMORY MODULE
Publication number
20050018495
Publication date
Jan 27, 2005
Netlist, Inc.
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
Arrangement of integrated circuits in a memory module
Publication number
20040184299
Publication date
Sep 23, 2004
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
Arrangement of integrated circuits in a memory module
Publication number
20040184300
Publication date
Sep 23, 2004
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
Arrangement of integrated circuits in a memory module
Publication number
20040184301
Publication date
Sep 23, 2004
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
Arrangement of integrated circuits in a memory module
Publication number
20040136229
Publication date
Jul 15, 2004
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
Arrangement of integrated circuits in a memory module
Publication number
20040057269
Publication date
Mar 25, 2004
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information
Patent Application
Arrangement of integrated ciruits in a memory module
Publication number
20030169614
Publication date
Sep 11, 2003
Jayesh R. Bhakta
Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...