Satish C. Saripella

Person

Starkville, MS, US

People

Patents Grantslast 30 patents

Information Patent Grant
Input buffer circuit
- Patent number 6,784,700
- Issue date Aug 31, 2004
- Cypress Semiconductor Corporation
- Jeffrey Scott Hunt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit technique for improved current matching in charge pump PLLS
- Patent number 6,445,211
- Issue date Sep 3, 2002
- Cypress Semiconductor Corporation
- Satish C. Saripella
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low noise switching regulator
- Patent number 6,441,593
- Issue date Aug 27, 2002
- Cypress Semiconductor Corp.
- Satish C. Saripella
- G05 - CONTROLLING REGULATING
Information Patent Grant
Voltage regulator
- Patent number 6,373,231
- Issue date Apr 16, 2002
- Cypress Semiconductor Corp.
- Timothy M. Lacey
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method, circuit and/or architecture for reducing gate oxide stress...
- Patent number 6,249,177
- Issue date Jun 19, 2001
- Cypress Semiconductor Corp.
- Derrick J. Savage
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method, architecture and circuit for writing to and reading from a...
- Patent number 6,122,203
- Issue date Sep 19, 2000
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-timed sense amplifier evaluation scheme
- Patent number 6,087,858
- Issue date Jul 11, 2000
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Reference voltage generator for reading a ROM cell in an integrated...
- Patent number 6,016,277
- Issue date Jan 18, 2000
- Cypress Semiconductor Corporation
- George M. Ansel
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, architecture and circuit for writing to a memory
- Patent number 5,986,970
- Issue date Nov 16, 1999
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Method, architecture and circuit for reducing and/or eliminating sm...
- Patent number 5,978,280
- Issue date Nov 2, 1999
- Cypress Semiconductor Corp.
- Satish C. Saripella
- G11 - INFORMATION STORAGE
Information Patent Grant
Wordline synchronized reference voltage generator
- Patent number 5,946,255
- Issue date Aug 31, 1999
- Cypress Semiconductor Corp.
- Satish C. Saripella
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual level wordline clamp for reduced memory cell current
- Patent number 5,936,894
- Issue date Aug 10, 1999
- Cypress Semiconductor Corp.
- Andrew L. Hawkins
- G11 - INFORMATION STORAGE
Information Patent Grant
Read only/random access memory architecture and methods for operati...
- Patent number 5,880,999
- Issue date Mar 9, 1999
- Cypress Semiconductor Corporation
- George M. Ansel
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual level wordline clamp for reduced memory cell current
- Patent number 5,864,507
- Issue date Jan 26, 1999
- Cypress Semiconductor Corporation
- Andrew L. Hawkins
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage level shifting circuit and low voltage sense amplifier
- Patent number 5,821,799
- Issue date Oct 13, 1998
- Cypress Semiconductor Corporation
- Satish C. Saripella
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit and method for disabling a bitline load
- Patent number 5,793,682
- Issue date Aug 11, 1998
- Cypress Semiconductor Corp.
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier design with dynamic recovery
- Patent number 5,748,021
- Issue date May 5, 1998
- Cypress Semiconductor Corporation
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier design
- Patent number 5,737,274
- Issue date Apr 7, 1998
- Cypress Semiconductor Corporation
- Jeffery Scott Hunt
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed sense amplifier having variable current level trip point
- Patent number 5,666,310
- Issue date Sep 9, 1997
- Cypress Semiconductor
- Donald Yuen Yu
- G11 - INFORMATION STORAGE

Satish C. Saripella

Person

Patents Grantslast 30 patents

Input buffer circuit

Circuit technique for improved current matching in charge pump PLLS

Low noise switching regulator

Voltage regulator

Method, circuit and/or architecture for reducing gate oxide stress...

Method, architecture and circuit for writing to and reading from a...

Self-timed sense amplifier evaluation scheme

Reference voltage generator for reading a ROM cell in an integrated...

Method, architecture and circuit for writing to a memory

Method, architecture and circuit for reducing and/or eliminating sm...

Wordline synchronized reference voltage generator

Dual level wordline clamp for reduced memory cell current

Read only/random access memory architecture and methods for operati...

Dual level wordline clamp for reduced memory cell current

Low voltage level shifting circuit and low voltage sense amplifier

Circuit and method for disabling a bitline load

Sense amplifier design with dynamic recovery

Sense amplifier design

High-speed sense amplifier having variable current level trip point