Sébastien Kerdiles

Person

Saintismier, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Process for manufacturing a composite structure
- Patent number 9,799,549
- Issue date Oct 24, 2017
- Soitec
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor on insulator structure hav...
- Patent number 9,293,473
- Issue date Mar 22, 2016
- Soitec
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a silicon-on-insulator structure
- Patent number 9,230,848
- Issue date Jan 5, 2016
- Soitec
- Carole David
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for thinning the active silicon layer of a substrate of “si...
- Patent number 9,082,819
- Issue date Jul 14, 2015
- Soitec
- Francois Boedt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor-on-insulator structure hav...
- Patent number 8,962,450
- Issue date Feb 24, 2015
- Soitec
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Charge reservoir structure
- Patent number 8,802,539
- Issue date Aug 12, 2014
- Soitec
- Frederic Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for molecular bonding of silicon and glass substrates
- Patent number 8,790,993
- Issue date Jul 29, 2014
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for transferring a layer from a donor substrate onto a handl...
- Patent number 8,728,913
- Issue date May 20, 2014
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a silicon-on-insulator structure employing...
- Patent number 8,691,662
- Issue date Apr 8, 2014
- Soitec
- Carole David
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a semiconductor-on-insulator structure hav...
- Patent number 8,658,514
- Issue date Feb 25, 2014
- Soitec
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for finishing a substrate of the semiconductor-on-insulator...
- Patent number 8,617,962
- Issue date Dec 31, 2013
- Soitec
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for molecular bonding of silicon and glass substrates
- Patent number 8,580,654
- Issue date Nov 12, 2013
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for transferring a layer from a donor substrate onto a handl...
- Patent number 8,476,148
- Issue date Jul 2, 2013
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Treatment for bonding interface stabilization
- Patent number 8,461,018
- Issue date Jun 11, 2013
- S.O.I. Tec Silicon on Insulator Technologies
- Eric Neyret
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for reclaiming a surface of a substrate
- Patent number 8,435,897
- Issue date May 7, 2013
- S.O.I. Tec Silicon on Insulator Technologies
- Aziz Alami-Idrissi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of producing a structure by layer transfer
- Patent number 8,420,500
- Issue date Apr 16, 2013
- Soitec
- Brigitte Soulier-Bouchet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Finishing method for a silicon on insulator substrate
- Patent number 8,389,412
- Issue date Mar 5, 2013
- Soitec
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for routing a chamfered substrate
- Patent number 8,357,587
- Issue date Jan 22, 2013
- Soitec
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of bonding two substrates
- Patent number 8,349,703
- Issue date Jan 8, 2013
- Soitec
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Treatment for bonding interface stabilization
- Patent number 8,216,916
- Issue date Jul 10, 2012
- S.O.I. Tec Silicon on Insulator Technologies
- Eric Neyret
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing roughness of a thick insulating layer
- Patent number 8,183,128
- Issue date May 22, 2012
- Soitec
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for bonding by molecular adhesion
- Patent number 8,158,013
- Issue date Apr 17, 2012
- Soitec
- Sebastien Kerdiles
- C03 - GLASS MINERAL OR SLAG WOOL
Information Patent Grant
Process for manufacturing a composite substrate
- Patent number 8,153,504
- Issue date Apr 10, 2012
- Soitec
- Frederic Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Equipment for bonding by molecular adhesion
- Patent number 8,091,601
- Issue date Jan 10, 2012
- S.O.I. Tec Silicon on Insulator Technologies
- Sebastien Kerdiles
- C03 - GLASS MINERAL OR SLAG WOOL
Information Patent Grant
Method of splitting a substrate
- Patent number 8,003,493
- Issue date Aug 23, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Composite substrate and method of fabricating the same
- Patent number 7,977,747
- Issue date Jul 12, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Frédéric Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transfer method with a treatment of a surface to be bonded
- Patent number 7,972,939
- Issue date Jul 5, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI substrates with a fine buried insulating layer
- Patent number 7,892,951
- Issue date Feb 22, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Didier Landru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Treatment for bonding interface stabilization
- Patent number 7,863,158
- Issue date Jan 4, 2011
- S.O.I. Tec Silicon on Insulator Technologies
- Eric Neyret
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tools and methods for disuniting semiconductor wafers
- Patent number 7,740,735
- Issue date Jun 22, 2010
- S.O.I. Tec Silicon on Insulator Technologies
- Sebastien Kerdiles
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESS FOR MANUFACTURING A COMPOSITE STRUCTURE
- Publication number 20160042989
- Publication date Feb 11, 2016
- SOITEC
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR ON INSULATOR STRUCTURE HAV...
- Publication number 20150171110
- Publication date Jun 18, 2015
- SOITEC
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR MOLECULAR BONDING OF SUBSTRATES
- Publication number 20150056783
- Publication date Feb 26, 2015
- SOITEC
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR THINNING THE ACTIVE SILICON LAYER OF A SUBSTRATE OF "SI...
- Publication number 20150031190
- Publication date Jan 29, 2015
- SOITEC
- Francois Boedt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...
- Publication number 20140038388
- Publication date Feb 6, 2014
- SOITEC
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES
- Publication number 20130309841
- Publication date Nov 21, 2013
- SOITEC
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TRANSFERRING A LAYER FROM A DONOR SUBSTRATE ONTO A HANDL...
- Publication number 20130295696
- Publication date Nov 7, 2013
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR FABRICATING A SILICON-ON-INSULATOR STRUCTURE EMPLOYING...
- Publication number 20130273712
- Publication date Oct 17, 2013
- Carole David
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR FABRICATING A SILICON-ON-INSULATOR STRUCTURE
- Publication number 20130207244
- Publication date Aug 15, 2013
- SOITEC
- Carole David
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FINISHING A SUBSTRATE OF THE SEMICONDUCTOR-ON-INSULATOR...
- Publication number 20130005122
- Publication date Jan 3, 2013
- SOITEC
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...
- Publication number 20120319121
- Publication date Dec 20, 2012
- SOITEC
- Patrick Reynaud
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR CONTROLLING THE DISTRIBUTION OF STRESSES IN A SEMICONDUC...
- Publication number 20120223419
- Publication date Sep 6, 2012
- SOITEC
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES
- Publication number 20120088350
- Publication date Apr 12, 2012
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINISHING METHOD FOR A SILICON ON INSULATOR SUBSTRATE
- Publication number 20120021613
- Publication date Jan 26, 2012
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TREATMENT FOR BONDING INTERFACE STABILIZATION
- Publication number 20110233720
- Publication date Sep 29, 2011
- S. O. I. Tec Silicon on Insulator Technologies
- Eric Neyret
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR ROUTING A CHAMFERED SUBSTRATE
- Publication number 20110140244
- Publication date Jun 16, 2011
- Walter Schwarzenbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR MANUFACTURING A COMPOSITE SUBSTRATE
- Publication number 20100323496
- Publication date Dec 23, 2010
- S. O. I. Tec Silicon on Insulator Technologies
- Frédéric Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PRODUCING A STRUCTURE BY LAYER TRANSFER
- Publication number 20100304507
- Publication date Dec 2, 2010
- S. O. I. Tec Silicon on Insulator Technologies
- Brigitte Soulier Bouchet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR TRANSFERRING A LAYER FROM A DONOR SUBSTRATE ONTO A HANDL...
- Publication number 20100279487
- Publication date Nov 4, 2010
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES, S.A.
- Sébastien KERDILES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for reclaiming a surface of a substrate
- Publication number 20100200854
- Publication date Aug 12, 2010
- S. O. I. Tec Silicon on Insulator Technologies
- Aziz Alami-Idrissi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device for polishing the edge of a semiconductor substrate
- Publication number 20100190416
- Publication date Jul 29, 2010
- S. O. I. Tec Silicon on Insulator Technologies
- Walter Schwarzenbach
- B24 - GRINDING POLISHING
Information Patent Application
CHARGE RESERVOIR STRUCTURE
- Publication number 20100187649
- Publication date Jul 29, 2010
- Frederic Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF SPLITTING A SUBSTRATE
- Publication number 20100176493
- Publication date Jul 15, 2010
- Nadia Ben Mohamed
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPOSITE SUBSTRATE AND METHOD OF FABRICATING THE SAME
- Publication number 20100148322
- Publication date Jun 17, 2010
- S.O.I.Tec Silicon on Insulator Technologies
- Frédéric Allibert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF BONDING TWO SUBSTRATES
- Publication number 20100093152
- Publication date Apr 15, 2010
- Sébastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSFER METHOD WITH A TREATMENT OF A SURFACE TO BE BONDED
- Publication number 20100015780
- Publication date Jan 21, 2010
- S.O.I.Tec Silicon on Insulator Technologies
- Sébastien KERDILES
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EQUIPMENT FOR BONDING BY MOLECULAR ADHESION
- Publication number 20090294072
- Publication date Dec 3, 2009
- S.O.I.Tec Silicon on Insulator Technologies
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR BONDING BY MOLECULAR ADHESION
- Publication number 20090261064
- Publication date Oct 22, 2009
- S.O.I.Tec Silicon on Insulator Technologies
- Sebastien Kerdiles
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI SUBSTRATES WITH A FINE BURIED INSULATING LAYER
- Publication number 20090111243
- Publication date Apr 30, 2009
- Didier Landru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF REDUCING ROUGHNESS OF A THICK INSULATING LAYER
- Publication number 20090023267
- Publication date Jan 22, 2009
- S.O.I.Tec Silicon on Insulator Technologies
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS

Sébastien Kerdiles

Person

Patents Grantslast 30 patents

Process for manufacturing a composite structure

Method for manufacturing a semiconductor on insulator structure hav...

Process for fabricating a silicon-on-insulator structure

Process for thinning the active silicon layer of a substrate of “si...

Method for manufacturing a semiconductor-on-insulator structure hav...

Charge reservoir structure

Method for molecular bonding of silicon and glass substrates

Method for transferring a layer from a donor substrate onto a handl...

Process for fabricating a silicon-on-insulator structure employing...

Method for manufacturing a semiconductor-on-insulator structure hav...

Method for finishing a substrate of the semiconductor-on-insulator...

Method for molecular bonding of silicon and glass substrates

Method for transferring a layer from a donor substrate onto a handl...

Treatment for bonding interface stabilization

Method for reclaiming a surface of a substrate

Method of producing a structure by layer transfer

Finishing method for a silicon on insulator substrate

Method for routing a chamfered substrate

Method of bonding two substrates

Treatment for bonding interface stabilization

Method of reducing roughness of a thick insulating layer

Process for bonding by molecular adhesion

Process for manufacturing a composite substrate

Equipment for bonding by molecular adhesion

Method of splitting a substrate

Composite substrate and method of fabricating the same

Transfer method with a treatment of a surface to be bonded

SOI substrates with a fine buried insulating layer

Treatment for bonding interface stabilization

Tools and methods for disuniting semiconductor wafers

Patents Applicationslast 30 patents

PROCESS FOR MANUFACTURING A COMPOSITE STRUCTURE

METHOD FOR MANUFACTURING A SEMICONDUCTOR ON INSULATOR STRUCTURE HAV...

SYSTEMS AND METHODS FOR MOLECULAR BONDING OF SUBSTRATES

PROCESS FOR THINNING THE ACTIVE SILICON LAYER OF A SUBSTRATE OF "SI...

METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...

METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES

METHOD FOR TRANSFERRING A LAYER FROM A DONOR SUBSTRATE ONTO A HANDL...

PROCESS FOR FABRICATING A SILICON-ON-INSULATOR STRUCTURE EMPLOYING...

PROCESS FOR FABRICATING A SILICON-ON-INSULATOR STRUCTURE

METHOD FOR FINISHING A SUBSTRATE OF THE SEMICONDUCTOR-ON-INSULATOR...

METHOD FOR MANUFACTURING A SEMICONDUCTOR-ON-INSULATOR STRUCTURE HAV...

METHOD FOR CONTROLLING THE DISTRIBUTION OF STRESSES IN A SEMICONDUC...

METHOD FOR MOLECULAR BONDING OF SILICON AND GLASS SUBSTRATES

FINISHING METHOD FOR A SILICON ON INSULATOR SUBSTRATE

TREATMENT FOR BONDING INTERFACE STABILIZATION

METHOD FOR ROUTING A CHAMFERED SUBSTRATE

PROCESS FOR MANUFACTURING A COMPOSITE SUBSTRATE

METHOD OF PRODUCING A STRUCTURE BY LAYER TRANSFER

METHOD FOR TRANSFERRING A LAYER FROM A DONOR SUBSTRATE ONTO A HANDL...

Method for reclaiming a surface of a substrate

Device for polishing the edge of a semiconductor substrate

CHARGE RESERVOIR STRUCTURE

METHOD OF SPLITTING A SUBSTRATE

COMPOSITE SUBSTRATE AND METHOD OF FABRICATING THE SAME

METHOD OF BONDING TWO SUBSTRATES

TRANSFER METHOD WITH A TREATMENT OF A SURFACE TO BE BONDED

EQUIPMENT FOR BONDING BY MOLECULAR ADHESION

PROCESS FOR BONDING BY MOLECULAR ADHESION

SOI SUBSTRATES WITH A FINE BURIED INSULATING LAYER

METHOD OF REDUCING ROUGHNESS OF A THICK INSULATING LAYER