Scott Brad Herner

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods for forming multi-layer vertical NOR-type memory string arrays
- Patent number 12,150,304
- Issue date Nov 19, 2024
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device with embedded high-bandwidth, high-capacity memory using waf...
- Patent number 12,068,286
- Issue date Aug 20, 2024
- SUNRISE MEMORY CORPORATION
- Khandker Nazrul Quader
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3-dimensional NOR memory array with very fine pitch: device and method
- Patent number 12,052,867
- Issue date Jul 30, 2024
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Staggered word line architecture for reduced disturb in 3-dimension...
- Patent number 11,968,837
- Issue date Apr 23, 2024
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin-film storage transistors in a 3-dimensional array of nor memor...
- Patent number 11,937,424
- Issue date Mar 19, 2024
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
Information Patent Grant
Memory device including modular memory units and modular circuit un...
- Patent number 11,923,341
- Issue date Mar 5, 2024
- SUNRISE MEMORY CORPORATION
- Khandker Nazrul Quader
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process for forming a vertical thin-film transistor that serves as...
- Patent number 11,910,612
- Issue date Feb 20, 2024
- SUNRISE MEMORY CORPORATION
- Tianhong Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming multi-layer vertical nor-type memory string arrays
- Patent number 11,844,217
- Issue date Dec 12, 2023
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for in situ preparation of antimony-doped silicon and silico...
- Patent number 11,800,716
- Issue date Oct 24, 2023
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
Information Patent Grant
Fabrication method for a 3-dimensional NOR memory array
- Patent number 11,751,392
- Issue date Sep 5, 2023
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3-dimensional NOR memory array architecture and methods for fabrica...
- Patent number 11,729,980
- Issue date Aug 15, 2023
- SUNRISE MEMORY CORPORATION
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Grant
Wafer bonding in fabrication of 3-dimensional NOR memory circuits
- Patent number 11,710,729
- Issue date Jul 25, 2023
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Charge-trapping layer with optimized number of charge-trapping site...
- Patent number 11,705,496
- Issue date Jul 18, 2023
- SUNRISE MEMORY CORPORATION
- Wu-Yi Henry Chien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device with embedded high-bandwidth, high-capacity memory using waf...
- Patent number 11,670,620
- Issue date Jun 6, 2023
- SUNRISE MEMORY CORPORATION
- Khandker Nazrul Quader
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vertical thin-film transistor and application as bit-line connector...
- Patent number 11,610,914
- Issue date Mar 21, 2023
- SUNRISE MEMORY CORPORATION
- Tianhong Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light emitting device with reflector
- Patent number 11,588,073
- Issue date Feb 21, 2023
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light emitting device with small footprint
- Patent number 11,527,571
- Issue date Dec 13, 2022
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Staggered word line architecture for reduced disturb in 3-dimension...
- Patent number 11,515,328
- Issue date Nov 29, 2022
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pixel or display with sub pixels selected by antifuse programming
- Patent number 11,444,121
- Issue date Sep 13, 2022
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming multilayer horizontal NOR-type thin-film memory...
- Patent number 11,404,431
- Issue date Aug 2, 2022
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical thing-film transistor and application as bit-line connecto...
- Patent number 11,398,492
- Issue date Jul 26, 2022
- SUNRISE MEMORY CORPORATION
- Tianhong Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3-dimensional NOR memory array architecture and methods for fabrica...
- Patent number 11,309,331
- Issue date Apr 19, 2022
- SUNRISE MEMORY CORPORATION
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for forming multi-layer vertical NOR-type memory string arrays
- Patent number 11,282,855
- Issue date Mar 22, 2022
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for in situ preparation of antimony-doped silicon and silico...
- Patent number 11,211,398
- Issue date Dec 28, 2021
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light emitting device with small footprint
- Patent number 11,183,534
- Issue date Nov 23, 2021
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication method for a 3-dimensional NOR memory array
- Patent number 11,177,281
- Issue date Nov 16, 2021
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer bonding in fabrication of 3-dimensional NOR memory circuits
- Patent number 11,158,620
- Issue date Oct 26, 2021
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Light emitting device with reflector
- Patent number 11,133,439
- Issue date Sep 28, 2021
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3-dimensional nor memory array with very fine pitch: device and method
- Patent number 11,069,711
- Issue date Jul 20, 2021
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Area-efficient subpixel apparatus
- Patent number 11,018,122
- Issue date May 25, 2021
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY USING WAF...
- Publication number 20240363592
- Publication date Oct 31, 2024
- Sunrise Memory Corporation
- Khandker Nazrul Quader
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3-DIMENSIONAL NOR MEMORY ARRAY WITH VERY FINE PITCH: DEVICE AND METHOD
- Publication number 20240357817
- Publication date Oct 24, 2024
- Sunrise Memory Corporation
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL THIN-FILM TRANSISTOR AND APPLICATION AS BIT-LINE CONNECTOR...
- Publication number 20240179919
- Publication date May 30, 2024
- Sunrise Memory Corporation
- Tianhong Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING MULTI-LAYER VERTICAL NOR-TYPE MEMORY STRING ARRAYS
- Publication number 20240099003
- Publication date Mar 21, 2024
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY USING WAF...
- Publication number 20230260969
- Publication date Aug 17, 2023
- Sunrise Memory Corporation
- Khandker Nazrul Quader
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STAGGERED WORD LINE ARCHITECTURE FOR REDUCED DISTURB IN 3-DIMENSION...
- Publication number 20230082546
- Publication date Mar 16, 2023
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN FILM STORAGE TRANSISTOR WITH SILICON OXIDE NITRIDE CHARGE TRAP...
- Publication number 20220392529
- Publication date Dec 8, 2022
- Sunrise Memory Corporation
- Scott Brad Herner
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR FORMING MULTILAYER HORIZONTAL NOR-TYPE THIN-FILM MEMORY...
- Publication number 20220328518
- Publication date Oct 13, 2022
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL THIN-FILM TRANSISTOR AND APPLICATION AS BIT-LINE CONNECTOR...
- Publication number 20220293623
- Publication date Sep 15, 2022
- Sunrise Memory Corporation
- Tianhong Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-DIMENSIONAL NOR MEMORY ARRAY ARCHITECTURE AND METHODS FOR FABRICA...
- Publication number 20220199643
- Publication date Jun 23, 2022
- Sunrise Memory Corporation
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FORMING MULTI-LAYER VERTICAL NOR-TYPE MEMORY STRING ARRAYS
- Publication number 20220165751
- Publication date May 26, 2022
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pixel or display with sub pixels selected by antifuse programming
- Publication number 20220139998
- Publication date May 5, 2022
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for in situ Preparation of Antimony-doped Silicon and Silico...
- Publication number 20220077189
- Publication date Mar 10, 2022
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN-FILM STORAGE TRANSISTORS IN A 3-DIMENSIONAL ARRAY OR NOR MEMOR...
- Publication number 20220068951
- Publication date Mar 3, 2022
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION METHOD FOR A 3-DIMENSIONAL NOR MEMORY ARRAY
- Publication number 20220037356
- Publication date Feb 3, 2022
- Sunrise Memory Corporation
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SILICON OXIDE NITRIDE TUNNEL DIELECTRIC FOR A STORAGE TRANSISTOR IN...
- Publication number 20220028871
- Publication date Jan 27, 2022
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Light emitting device with small footprint
- Publication number 20220028920
- Publication date Jan 27, 2022
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Bonding in Fabrication of 3-Dimensional NOR Memory Circuits
- Publication number 20210407983
- Publication date Dec 30, 2021
- Sunrise Memory Corporation
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE INCLUDING MODULAR MEMORY UNITS AND MODULAR CIRCUIT UN...
- Publication number 20210398949
- Publication date Dec 23, 2021
- Sunrise Memory Corporation
- Khandker Nazrul Quader
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Light emitting device with reflector
- Publication number 20210384382
- Publication date Dec 9, 2021
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHARGE-TRAPPING LAYER WITH OPTIMIZED NUMBER OF CHARGE-TRAPPING SITE...
- Publication number 20210320182
- Publication date Oct 14, 2021
- SUNRISE MEMORY CORPORATION
- Wu-Yi Henry Chien
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-DIMENSIONAL NOR MEMORY ARRAY WITH VERY FINE PITCH: DEVICE AND METHOD
- Publication number 20210313348
- Publication date Oct 7, 2021
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Light emitting device with small footprint
- Publication number 20210305464
- Publication date Sep 30, 2021
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Staggered Word Line Architecture for Reduced Disturb in 3-Dimension...
- Publication number 20210225873
- Publication date Jul 22, 2021
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL THIN-FILM TRANSISTOR AND APPLICATION AS BIT-LINE CONNECTOR...
- Publication number 20210210506
- Publication date Jul 8, 2021
- SUNRISE MEMORY CORPORATION
- Tianhong Yan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Area-efficient subpixel apparatus
- Publication number 20210134774
- Publication date May 6, 2021
- Black Peak LLC
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-DIMENSIONAL NOR MEMORY ARRAY ARCHITECTURE AND METHODS FOR FABRICA...
- Publication number 20200403002
- Publication date Dec 24, 2020
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Staggered Word Line Architecture for Reduced Disturb in 3-Dimension...
- Publication number 20200335519
- Publication date Oct 22, 2020
- SUNRISE MEMORY CORPORATION
- Scott Brad Herner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION METHOD FOR A 3-DIMENSIONAL NOR MEMORY ARRAY
- Publication number 20200328228
- Publication date Oct 15, 2020
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3-DIMENSIONAL NOR MEMORY ARRAY WITH VERY FINE PITCH: DEVICE AND METHOD
- Publication number 20200303414
- Publication date Sep 24, 2020
- SUNRISE MEMORY CORPORATION
- Eli Harari
- H01 - BASIC ELECTRIC ELEMENTS

Scott Brad Herner

Person

Patents Grantslast 30 patents

Methods for forming multi-layer vertical NOR-type memory string arrays

Device with embedded high-bandwidth, high-capacity memory using waf...

3-dimensional NOR memory array with very fine pitch: device and method

Staggered word line architecture for reduced disturb in 3-dimension...

Thin-film storage transistors in a 3-dimensional array of nor memor...

Memory device including modular memory units and modular circuit un...

Process for forming a vertical thin-film transistor that serves as...

Methods for forming multi-layer vertical nor-type memory string arrays

Method for in situ preparation of antimony-doped silicon and silico...

Fabrication method for a 3-dimensional NOR memory array

3-dimensional NOR memory array architecture and methods for fabrica...

Wafer bonding in fabrication of 3-dimensional NOR memory circuits

Charge-trapping layer with optimized number of charge-trapping site...

Device with embedded high-bandwidth, high-capacity memory using waf...

Vertical thin-film transistor and application as bit-line connector...

Light emitting device with reflector

Light emitting device with small footprint

Staggered word line architecture for reduced disturb in 3-dimension...

Pixel or display with sub pixels selected by antifuse programming

Methods for forming multilayer horizontal NOR-type thin-film memory...

Vertical thing-film transistor and application as bit-line connecto...

3-dimensional NOR memory array architecture and methods for fabrica...

Methods for forming multi-layer vertical NOR-type memory string arrays

Method for in situ preparation of antimony-doped silicon and silico...

Light emitting device with small footprint

Fabrication method for a 3-dimensional NOR memory array

Wafer bonding in fabrication of 3-dimensional NOR memory circuits

Light emitting device with reflector

3-dimensional nor memory array with very fine pitch: device and method

Area-efficient subpixel apparatus

Patents Applicationslast 30 patents

DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY USING WAF...

3-DIMENSIONAL NOR MEMORY ARRAY WITH VERY FINE PITCH: DEVICE AND METHOD

VERTICAL THIN-FILM TRANSISTOR AND APPLICATION AS BIT-LINE CONNECTOR...

METHODS FOR FORMING MULTI-LAYER VERTICAL NOR-TYPE MEMORY STRING ARRAYS

DEVICE WITH EMBEDDED HIGH-BANDWIDTH, HIGH-CAPACITY MEMORY USING WAF...

STAGGERED WORD LINE ARCHITECTURE FOR REDUCED DISTURB IN 3-DIMENSION...

THIN FILM STORAGE TRANSISTOR WITH SILICON OXIDE NITRIDE CHARGE TRAP...

METHODS FOR FORMING MULTILAYER HORIZONTAL NOR-TYPE THIN-FILM MEMORY...

VERTICAL THIN-FILM TRANSISTOR AND APPLICATION AS BIT-LINE CONNECTOR...

3-DIMENSIONAL NOR MEMORY ARRAY ARCHITECTURE AND METHODS FOR FABRICA...

METHODS FOR FORMING MULTI-LAYER VERTICAL NOR-TYPE MEMORY STRING ARRAYS

Pixel or display with sub pixels selected by antifuse programming

Method for in situ Preparation of Antimony-doped Silicon and Silico...

THIN-FILM STORAGE TRANSISTORS IN A 3-DIMENSIONAL ARRAY OR NOR MEMOR...

FABRICATION METHOD FOR A 3-DIMENSIONAL NOR MEMORY ARRAY

SILICON OXIDE NITRIDE TUNNEL DIELECTRIC FOR A STORAGE TRANSISTOR IN...

Light emitting device with small footprint

Wafer Bonding in Fabrication of 3-Dimensional NOR Memory Circuits

MEMORY DEVICE INCLUDING MODULAR MEMORY UNITS AND MODULAR CIRCUIT UN...

Light emitting device with reflector

CHARGE-TRAPPING LAYER WITH OPTIMIZED NUMBER OF CHARGE-TRAPPING SITE...

3-DIMENSIONAL NOR MEMORY ARRAY WITH VERY FINE PITCH: DEVICE AND METHOD

Light emitting device with small footprint

Staggered Word Line Architecture for Reduced Disturb in 3-Dimension...

VERTICAL THIN-FILM TRANSISTOR AND APPLICATION AS BIT-LINE CONNECTOR...

Area-efficient subpixel apparatus

3-DIMENSIONAL NOR MEMORY ARRAY ARCHITECTURE AND METHODS FOR FABRICA...

Staggered Word Line Architecture for Reduced Disturb in 3-Dimension...

FABRICATION METHOD FOR A 3-DIMENSIONAL NOR MEMORY ARRAY

3-DIMENSIONAL NOR MEMORY ARRAY WITH VERY FINE PITCH: DEVICE AND METHOD